Commit 45f169ec authored by Krzysztof Helt's avatar Krzysztof Helt Committed by Linus Torvalds
Browse files

pm2fb: source code improvements 



This patch concentrates on source compacting, simplification and more
conformance to kernel coding standards.
The major changes:
- RD32() and WR() functions are merged into pm2_RD() and pm2_WR()
- conditional (with switch()) RDAC functions are separated in two
unconditional ones
- the conditional pm2fb_block_op() function is merged into pm2fb_fillrect()
and pm2fb_copyarea()
- WAIT_FIFO() values are corrected

Signed-off-by: default avatarKrzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: default avatarAntonino Daplas <adaplas@gmail.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 91b3a6f4

drivers/video/pm2fb.c

+155 −195
Original line number Diff line number Diff line
@@ -146,56 +146,35 @@ static struct fb_var_screeninfo pm2fb_var __devinitdata = { 
 * Utility functions

 */



static inline u32 RD32(unsigned char __iomem *base, s32 off)

{

	return fb_readl(base + off);

}



static inline void WR32(unsigned char __iomem *base, s32 off, u32 v)

{

	fb_writel(v, base + off);

}



static inline u32 pm2_RD(struct pm2fb_par* p, s32 off)

{

	return RD32(p->v_regs, off);

	return fb_readl(p->v_regs + off);

}



static inline void pm2_WR(struct pm2fb_par* p, s32 off, u32 v)

{

	WR32(p->v_regs, off, v);

	fb_writel(v, p->v_regs + off);

}



static inline u32 pm2_RDAC_RD(struct pm2fb_par* p, s32 idx)

{

	int index = PM2R_RD_INDEXED_DATA;

	switch (p->type) {

	case PM2_TYPE_PERMEDIA2:

	pm2_WR(p, PM2R_RD_PALETTE_WRITE_ADDRESS, idx);

		break;

	case PM2_TYPE_PERMEDIA2V:

		pm2_WR(p, PM2VR_RD_INDEX_LOW, idx & 0xff);

		index = PM2VR_RD_INDEXED_DATA;

		break;

	mb();

	return pm2_RD(p, PM2R_RD_INDEXED_DATA);

}



static inline u32 pm2v_RDAC_RD(struct pm2fb_par* p, s32 idx)

{

	pm2_WR(p, PM2VR_RD_INDEX_LOW, idx & 0xff);

	mb();

	return pm2_RD(p, index);

	return pm2_RD(p,  PM2VR_RD_INDEXED_DATA);

}



static inline void pm2_RDAC_WR(struct pm2fb_par* p, s32 idx, u32 v)

{

	int index = PM2R_RD_INDEXED_DATA;

	switch (p->type) {

	case PM2_TYPE_PERMEDIA2:

	pm2_WR(p, PM2R_RD_PALETTE_WRITE_ADDRESS, idx);

		break;

	case PM2_TYPE_PERMEDIA2V:

		pm2_WR(p, PM2VR_RD_INDEX_LOW, idx & 0xff);

		index = PM2VR_RD_INDEXED_DATA;

		break;

	}

	wmb();

	pm2_WR(p, index, v);

	pm2_WR(p, PM2R_RD_INDEXED_DATA, v);

	wmb();

}
@@ -257,20 +236,17 @@ static u32 partprod(u32 xres) 
static u32 to3264(u32 timing, int bpp, int is64)

{

	switch (bpp) {

	case 24:

		timing *= 3;

	case 8:

		timing >>= 2 + is64;

		break;

		timing >>= 1;

	case 16:

		timing >>= 1 + is64;

		break;

	case 24:

		timing = (timing * 3) >> (2 + is64);

		break;

	case 32:

		if (is64)

		timing >>= 1;

	case 32:

		break;

	}

	if (is64)

		timing >>= 1;

	return timing;

}
@@ -409,16 +385,21 @@ static void reset_config(struct pm2fb_par* p) 
		pm2_RDAC_WR(p, PM2I_RD_MODE_CONTROL, 0); /* no overlay */

		pm2_RDAC_WR(p, PM2I_RD_CURSOR_CONTROL, 0);

		pm2_RDAC_WR(p, PM2I_RD_MISC_CONTROL, PM2F_RD_PALETTE_WIDTH_8);

		break;

	case PM2_TYPE_PERMEDIA2V:

		pm2v_RDAC_WR(p, PM2VI_RD_MISC_CONTROL, 1); /* 8bit */

		break;

	}

		pm2_RDAC_WR(p, PM2I_RD_COLOR_KEY_CONTROL, 0);

		pm2_RDAC_WR(p, PM2I_RD_OVERLAY_KEY, 0);

		pm2_RDAC_WR(p, PM2I_RD_RED_KEY, 0);

		pm2_RDAC_WR(p, PM2I_RD_GREEN_KEY, 0);

		pm2_RDAC_WR(p, PM2I_RD_BLUE_KEY, 0);

		break;

	case PM2_TYPE_PERMEDIA2V:

		pm2v_RDAC_WR(p, PM2VI_RD_MISC_CONTROL, 1); /* 8bit */

		pm2v_RDAC_WR(p, PM2I_RD_COLOR_KEY_CONTROL, 0);

		pm2v_RDAC_WR(p, PM2I_RD_OVERLAY_KEY, 0);

		pm2v_RDAC_WR(p, PM2I_RD_RED_KEY, 0);

		pm2v_RDAC_WR(p, PM2I_RD_GREEN_KEY, 0);

		pm2v_RDAC_WR(p, PM2I_RD_BLUE_KEY, 0);

		break;

	}

}



static void set_aperture(struct pm2fb_par* p, u32 depth)
@@ -428,7 +409,7 @@ static void set_aperture(struct pm2fb_par* p, u32 depth) 
	 * hosts, the on-chip aperture settings are used where

	 * possible to translate from host to card byte order.

	 */

	WAIT_FIFO(p, 4);

	WAIT_FIFO(p, 2);

#ifdef __LITTLE_ENDIAN

	pm2_WR(p, PM2R_APERTURE_ONE, PM2F_APERTURE_STANDARD);

#else
@@ -476,7 +457,7 @@ static void set_memclock(struct pm2fb_par* par, u32 clk) 
	switch (par->type) {

	case PM2_TYPE_PERMEDIA2V:

		pm2v_mnp(clk/2, &m, &n, &p);

		WAIT_FIFO(par, 8);

		WAIT_FIFO(par, 12);

		pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_MCLK_CONTROL >> 8);

		pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 0);

		pm2v_RDAC_WR(par, PM2VI_RD_MCLK_PRESCALE, m);
@@ -484,10 +465,9 @@ static void set_memclock(struct pm2fb_par* par, u32 clk) 
		pm2v_RDAC_WR(par, PM2VI_RD_MCLK_POSTSCALE, p);

		pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 1);

		rmb();

		for (i = 256;

		     i && !(pm2_RDAC_RD(par, PM2VI_RD_MCLK_CONTROL) & 2);

		     i--)

			;

		for (i = 256; i; i--)

			if (pm2v_RDAC_RD(par, PM2VI_RD_MCLK_CONTROL) & 2)

				break;

		pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0);

		break;

	case PM2_TYPE_PERMEDIA2:
@@ -499,10 +479,9 @@ static void set_memclock(struct pm2fb_par* par, u32 clk) 
		pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 8|p);

		pm2_RDAC_RD(par, PM2I_RD_MEMORY_CLOCK_STATUS);

		rmb();

		for (i = 256;

		     i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED);

		     i--)

			;

		for (i = 256; i; i--)

			if (pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED)

				break;

		break;

	}

}
@@ -515,17 +494,16 @@ static void set_pixclock(struct pm2fb_par* par, u32 clk) 
	switch (par->type) {

	case PM2_TYPE_PERMEDIA2:

		pm2_mnp(clk, &m, &n, &p);

		WAIT_FIFO(par, 8);

		WAIT_FIFO(par, 10);

		pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A3, 0);

		pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A1, m);

		pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A2, n);

		pm2_RDAC_WR(par, PM2I_RD_PIXEL_CLOCK_A3, 8|p);

		pm2_RDAC_RD(par, PM2I_RD_PIXEL_CLOCK_STATUS);

		rmb();

		for (i = 256;

		     i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED);

		     i--)

			;

		for (i = 256; i; i--)

			if (pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED)

				break;

		break;

	case PM2_TYPE_PERMEDIA2V:

		pm2v_mnp(clk/2, &m, &n, &p);
@@ -541,9 +519,7 @@ static void set_pixclock(struct pm2fb_par* par, u32 clk) 


static void set_video(struct pm2fb_par* p, u32 video) {

	u32 tmp;

	u32 vsync;



	vsync = video;

	u32 vsync = video;



	DPRINTK("video = 0x%x\n", video);
@@ -581,10 +557,6 @@ static void set_video(struct pm2fb_par* p, u32 video) { 
}



/*

 *

 */



/**

 *	pm2fb_check_var - Optional function. Validates a var passed in.

 *	@var: frame buffer variable screen structure

 *	@info: frame buffer structure that represents a single frame buffer
@@ -702,7 +674,9 @@ static int pm2fb_set_par(struct fb_info *info) 
{

	struct pm2fb_par *par = info->par;

	u32 pixclock;

	u32 width, height, depth;

	u32 width = (info->var.xres_virtual + 7) & ~7;

	u32 height = info->var.yres_virtual;

	u32 depth = (info->var.bits_per_pixel + 7) & ~7;

	u32 hsstart, hsend, hbend, htotal;

	u32 vsstart, vsend, vbend, vtotal;

	u32 stride;
@@ -712,7 +686,7 @@ static int pm2fb_set_par(struct fb_info *info) 
	u32 txtmap = 0;

	u32 pixsize = 0;

	u32 clrformat = 0;

	u32 xres;

	u32 xres = (info->var.xres + 31) & ~31;

	int data64;



	reset_card(par);
@@ -721,13 +695,9 @@ static int pm2fb_set_par(struct fb_info *info) 
	if (par->memclock)

		set_memclock(par, par->memclock);



	width = (info->var.xres_virtual + 7) & ~7;

	height = info->var.yres_virtual;

	depth = (info->var.bits_per_pixel + 7) & ~7;

	depth = (depth > 32) ? 32 : depth;

	data64 = depth > 8 || par->type == PM2_TYPE_PERMEDIA2V;



	xres = (info->var.xres + 31) & ~31;

	pixclock = PICOS2KHZ(info->var.pixclock);

	if (pixclock > PM2_MAX_PIXCLOCK) {

		DPRINTK("pixclock too high (%uKHz)\n", pixclock);
@@ -794,8 +764,6 @@ static int pm2fb_set_par(struct fb_info *info) 


	mb();

	WAIT_FIFO(par, 19);

	pm2_RDAC_WR(par, PM2I_RD_COLOR_KEY_CONTROL,

		    ( depth == 8 ) ? 0 : PM2F_COLOR_KEY_TEST_OFF);

	switch (depth) {

	case 8:

		pm2_WR(par, PM2R_FB_READ_PIXEL, 0);
@@ -845,14 +813,18 @@ static int pm2fb_set_par(struct fb_info *info) 
	pm2_WR(par, PM2R_SCREEN_BASE, base);

	wmb();

	set_video(par, video);

	WAIT_FIFO(par, 4);

	WAIT_FIFO(par, 6);

	switch (par->type) {

	case PM2_TYPE_PERMEDIA2:

		pm2_RDAC_WR(par, PM2I_RD_COLOR_MODE, clrmode);

		pm2_RDAC_WR(par, PM2I_RD_COLOR_KEY_CONTROL,

			        (depth == 8) ? 0 : PM2F_COLOR_KEY_TEST_OFF);

		break;

	case PM2_TYPE_PERMEDIA2V:

		pm2v_RDAC_WR(par, PM2VI_RD_PIXEL_SIZE, pixsize);

		pm2v_RDAC_WR(par, PM2VI_RD_COLOR_FORMAT, clrformat);

		pm2v_RDAC_WR(par, PM2I_RD_COLOR_KEY_CONTROL,

			         (depth == 8) ? 0 : PM2F_COLOR_KEY_TEST_OFF);

		break;

	}

	set_pixclock(par, pixclock);
@@ -983,11 +955,9 @@ static int pm2fb_pan_display(struct fb_var_screeninfo *var, 
{

	struct pm2fb_par *p = info->par;

	u32 base;

	u32 depth;

	u32 xres;

	u32 depth = (var->bits_per_pixel + 7) & ~7;

	u32 xres = (var->xres + 31) & ~31;



	xres = (var->xres + 31) & ~31;

	depth = (var->bits_per_pixel + 7) & ~7;

	depth = (depth > 32) ? 32 : depth;

	base = to3264(var->yoffset * xres + var->xoffset, depth, 1);

	WAIT_FIFO(p, 1);
@@ -1060,37 +1030,10 @@ static int pm2fb_sync(struct fb_info *info) 
	return 0;

}



/*

 * block operation. copy=0: rectangle fill, copy=1: rectangle copy.

 */

static void pm2fb_block_op(struct fb_info* info, int copy,

				s32 xsrc, s32 ysrc,

				s32 x, s32 y, s32 w, s32 h,

				u32 color) {

	struct pm2fb_par *par = info->par;



	if (!w || !h)

		return;

	WAIT_FIFO(par, 5);

	pm2_WR(par, PM2R_CONFIG, PM2F_CONFIG_FB_WRITE_ENABLE |

		PM2F_CONFIG_FB_READ_SOURCE_ENABLE);

	if (copy)

		pm2_WR(par, PM2R_FB_SOURCE_DELTA,

			((ysrc-y) & 0xfff) << 16 | ((xsrc-x) & 0xfff));

	else

		pm2_WR(par, PM2R_FB_BLOCK_COLOR, color);

	pm2_WR(par, PM2R_RECTANGLE_ORIGIN, (y << 16) | x);

	pm2_WR(par, PM2R_RECTANGLE_SIZE, (h << 16) | w);

	wmb();

	pm2_WR(par, PM2R_RENDER, PM2F_RENDER_RECTANGLE |

				(x<xsrc ? PM2F_INCREASE_X : 0) |

				(y<ysrc ? PM2F_INCREASE_Y : 0) |

				(copy ? 0 : PM2F_RENDER_FASTFILL));

}



static void pm2fb_fillrect (struct fb_info *info,

				const struct fb_fillrect *region)

{

  	struct pm2fb_par *par = info->par;

	struct fb_fillrect modded;

	int vxres, vyres;

	u32 color = (info->fix.visual == FB_VISUAL_TRUECOLOR) ?
@@ -1123,17 +1066,25 @@ static void pm2fb_fillrect (struct fb_info *info, 
	if (info->var.bits_per_pixel <= 16)

		color |= color << 16;



	if(info->var.bits_per_pixel != 24)

		pm2fb_block_op(info, 0, 0, 0,

				modded.dx, modded.dy,

				modded.width, modded.height, color);

	else

	WAIT_FIFO(par, 3);

	pm2_WR(par, PM2R_CONFIG, PM2F_CONFIG_FB_WRITE_ENABLE);

	pm2_WR(par, PM2R_RECTANGLE_ORIGIN, (modded.dy << 16) | modded.dx);

	pm2_WR(par, PM2R_RECTANGLE_SIZE, (modded.height << 16) | modded.width);

	if (info->var.bits_per_pixel != 24) {

		WAIT_FIFO(par, 2);

		pm2_WR(par, PM2R_FB_BLOCK_COLOR, color);

		wmb();

		pm2_WR(par, PM2R_RENDER,

				PM2F_RENDER_RECTANGLE | PM2F_RENDER_FASTFILL);

	} else {

		cfb_fillrect(info, region);

	}

}



static void pm2fb_copyarea(struct fb_info *info,

				const struct fb_copyarea *area)

{

	struct pm2fb_par *par = info->par;

	struct fb_copyarea modded;

	u32 vxres, vyres;
@@ -1163,9 +1114,18 @@ static void pm2fb_copyarea(struct fb_info *info, 
	if (modded.dy + modded.height > vyres)

		modded.height = vyres - modded.dy;



	pm2fb_block_op(info, 1, modded.sx, modded.sy,

			modded.dx, modded.dy,

			modded.width, modded.height, 0);

	WAIT_FIFO(par, 5);

	pm2_WR(par, PM2R_CONFIG, PM2F_CONFIG_FB_WRITE_ENABLE |

		PM2F_CONFIG_FB_READ_SOURCE_ENABLE);

	pm2_WR(par, PM2R_FB_SOURCE_DELTA,

			((modded.sy-modded.dy) & 0xfff) << 16 |

			((modded.sx-modded.dx) & 0xfff));

	pm2_WR(par, PM2R_RECTANGLE_ORIGIN, (modded.dy << 16) | modded.dx);

	pm2_WR(par, PM2R_RECTANGLE_SIZE, (modded.height << 16) | modded.width);

	wmb();

	pm2_WR(par, PM2R_RENDER, PM2F_RENDER_RECTANGLE |

				(modded.dx<modded.sx ? PM2F_INCREASE_X : 0) |

				(modded.dy<modded.sy ? PM2F_INCREASE_Y : 0));

}



static void pm2fb_imageblit(struct fb_info *info, const struct fb_image *image)

CRA Git | Maintained and supported by SUSTech CRA and CCSE