Commit 45f019a6 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
Browse files

soc/tegra: regulators: Do nothing if voltage is unchanged 



There is no need to re-apply the same voltage. This change is just a minor
cleanup.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 19d41e5e

drivers/soc/tegra/regulators-tegra20.c

+7 −1
Original line number Diff line number Diff line
@@ -162,6 +162,9 @@ static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra, 
			core_target_uV = max(rtc_uV - max_spread, core_target_uV);

		}



		if (core_uV == core_target_uV)

			goto update_rtc;



		err = regulator_set_voltage_rdev(core_rdev,

						 core_target_uV,

						 core_max_uV,
@@ -170,7 +173,7 @@ static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra, 
			return err;



		core_uV = core_target_uV;



update_rtc:

		if (rtc_uV < rtc_min_uV) {

			rtc_target_uV = min(rtc_uV + max_spread, rtc_min_uV);

			rtc_target_uV = min(core_uV + max_spread, rtc_target_uV);
@@ -179,6 +182,9 @@ static int tegra20_core_rtc_update(struct tegra_regulator_coupler *tegra, 
			rtc_target_uV = max(core_uV - max_spread, rtc_target_uV);

		}



		if (rtc_uV == rtc_target_uV)

			continue;



		err = regulator_set_voltage_rdev(rtc_rdev,

						 rtc_target_uV,

						 rtc_max_uV,

drivers/soc/tegra/regulators-tegra30.c

+6 −0
Original line number Diff line number Diff line
@@ -209,6 +209,9 @@ static int tegra30_voltage_update(struct tegra_regulator_coupler *tegra, 
			cpu_target_uV = max(core_uV - max_spread, cpu_target_uV);

		}



		if (cpu_uV == cpu_target_uV)

			goto update_core;



		err = regulator_set_voltage_rdev(cpu_rdev,

						 cpu_target_uV,

						 cpu_max_uV,
@@ -231,6 +234,9 @@ update_core: 
			core_target_uV = max(core_target_uV, core_uV - core_max_step);

		}



		if (core_uV == core_target_uV)

			continue;



		err = regulator_set_voltage_rdev(core_rdev,

						 core_target_uV,

						 core_max_uV,

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