Commit 45d0b75b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2020-02-28' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Just some fixes for this week: amdgpu, radeon and i915.

  The main i915 one is a regression Gen7 (Ivybridge/Haswell), this moves
  them back from trying to use the full-ppgtt support to the aliasing
  version it used to use due to gpu hangs. Otherwise it's pretty quiet.

  amdgpu:
   - Drop DRIVER_USE_AGP
   - Fix memory leak in GPU reset
   - Resume fix for raven

  radeon:
   - Drop DRIVER_USE_AGP

  i915:
   - downgrade gen7 back to aliasing-ppgtt to avoid GPU hangs
   - shrinker fix
   - pmu leak and double free fixes
   - gvt user after free and virtual display reset fixes
   - randconfig build fix"

* tag 'drm-fixes-2020-02-28' of git://anongit.freedesktop.org/drm/drm:
  drm/radeon: Inline drm_get_pci_dev
  drm/amdgpu: Drop DRIVER_USE_AGP
  drm/i915: Avoid recursing onto active vma from the shrinker
  drm/i915/pmu: Avoid using globals for PMU events
  drm/i915/pmu: Avoid using globals for CPU hotplug state
  drm/i915/gtt: Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgtt
  drm/i915: fix header test with GCOV
  amdgpu/gmc_v9: save/restore sdpif regs during S3
  drm/amdgpu: fix memory leak during TDR test(v2)
  drm/i915/gvt: Fix orphan vgpu dmabuf_objs' lifetime
  drm/i915/gvt: Separate display reset from ALL_ENGINES reset
parents 7058b837 f091bf39

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -1389,7 +1389,7 @@ amdgpu_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe, 


static struct drm_driver kms_driver = {

	.driver_features =

	    DRIVER_USE_AGP | DRIVER_ATOMIC |

	    DRIVER_ATOMIC |

	    DRIVER_GEM |

	    DRIVER_RENDER | DRIVER_MODESET | DRIVER_SYNCOBJ |

	    DRIVER_SYNCOBJ_TIMELINE,

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+1 −0
Original line number Diff line number Diff line
@@ -195,6 +195,7 @@ struct amdgpu_gmc { 
	uint32_t                srbm_soft_reset;

	bool			prt_warning;

	uint64_t		stolen_size;

	uint32_t		sdpif_register;

	/* apertures */

	u64			shared_aperture_start;

	u64			shared_aperture_end;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+36 −1
Original line number Diff line number Diff line
@@ -1271,6 +1271,19 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) 
	}

}



/**

 * gmc_v9_0_restore_registers - restores regs

 *

 * @adev: amdgpu_device pointer

 *

 * This restores register values, saved at suspend.

 */

static void gmc_v9_0_restore_registers(struct amdgpu_device *adev)

{

	if (adev->asic_type == CHIP_RAVEN)

		WREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);

}



/**

 * gmc_v9_0_gart_enable - gart enable

 *
@@ -1376,6 +1389,20 @@ static int gmc_v9_0_hw_init(void *handle) 
	return r;

}



/**

 * gmc_v9_0_save_registers - saves regs

 *

 * @adev: amdgpu_device pointer

 *

 * This saves potential register values that should be

 * restored upon resume

 */

static void gmc_v9_0_save_registers(struct amdgpu_device *adev)

{

	if (adev->asic_type == CHIP_RAVEN)

		adev->gmc.sdpif_register = RREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);

}



/**

 * gmc_v9_0_gart_disable - gart disable

 *
@@ -1412,9 +1439,16 @@ static int gmc_v9_0_hw_fini(void *handle) 


static int gmc_v9_0_suspend(void *handle)

{

	int r;

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	return gmc_v9_0_hw_fini(adev);

	r = gmc_v9_0_hw_fini(adev);

	if (r)

		return r;



	gmc_v9_0_save_registers(adev);



	return 0;

}



static int gmc_v9_0_resume(void *handle)
@@ -1422,6 +1456,7 @@ static int gmc_v9_0_resume(void *handle) 
	int r;

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	gmc_v9_0_restore_registers(adev);

	r = gmc_v9_0_hw_init(adev);

	if (r)

		return r;

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

+2 −0
Original line number Diff line number Diff line
@@ -7376,6 +7376,8 @@ 
#define mmCRTC4_CRTC_DRR_CONTROL                                                                       0x0f3e

#define mmCRTC4_CRTC_DRR_CONTROL_BASE_IDX                                                              2









#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0                                                                  0x395d









#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX                                                         2

















// addressBlock: dce_dc_fmt4_dispdec









// base address: 0x2000

























drivers/gpu/drm/amd/powerplay/smu_v11_0.c



+5
−1






























Original line number
Diff line number
Diff line







@@ -978,8 +978,12 @@ int smu_v11_0_init_max_sustainable_clocks(struct smu_context *smu)







	struct smu_11_0_max_sustainable_clocks *max_sustainable_clocks;









	int ret = 0;



















	if (!smu->smu_table.max_sustainable_clocks)









		max_sustainable_clocks = kzalloc(sizeof(struct smu_11_0_max_sustainable_clocks),









					 GFP_KERNEL);









	else









		max_sustainable_clocks = smu->smu_table.max_sustainable_clocks;



















	smu->smu_table.max_sustainable_clocks = (void *)max_sustainable_clocks;



















	max_sustainable_clocks->uclock = smu->smu_table.boot_values.uclk / 100;








































































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