Commit 455531e9 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc: Remove IBM405 Erratum #77 



This erratum is dedicated to IBM 405GP and STB03xxx
which are now gone.

Remove this erratum.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/44dbc08e9034681eb28324cbabc086e97044c36c.1590079969.git.christophe.leroy@csgroup.eu
parent 59fb463b

arch/powerpc/include/asm/asm-405.h

deleted100644 → 0
+0 −19
Original line number Diff line number Diff line 
#ifndef _ASM_POWERPC_ASM_405_H

#define _ASM_POWERPC_ASM_405_H



#include <asm/asm-const.h>



#ifdef __KERNEL__

#ifdef CONFIG_IBM405_ERR77

/* Erratum #77 on the 405 means we need a sync or dcbt before every

 * stwcx.  The old ATOMIC_SYNC_FIX covered some but not all of this.

 */

#define PPC405_ERR77(ra,rb)	stringify_in_c(dcbt	ra, rb;)

#define	PPC405_ERR77_SYNC	stringify_in_c(sync;)

#else

#define PPC405_ERR77(ra,rb)

#define PPC405_ERR77_SYNC

#endif

#endif



#endif /* _ASM_POWERPC_ASM_405_H */

arch/powerpc/include/asm/atomic.h

+0 −11
Original line number Diff line number Diff line
@@ -10,7 +10,6 @@ 
#include <linux/types.h>

#include <asm/cmpxchg.h>

#include <asm/barrier.h>

#include <asm/asm-405.h>



#define ATOMIC_INIT(i)		{ (i) }
@@ -47,7 +46,6 @@ static __inline__ void atomic_##op(int a, atomic_t *v) \ 
	__asm__ __volatile__(						\

"1:	lwarx	%0,0,%3		# atomic_" #op "\n"			\

	#asm_op " %0,%2,%0\n"						\

	PPC405_ERR77(0,%3)						\

"	stwcx.	%0,0,%3 \n"						\

"	bne-	1b\n"							\

	: "=&r" (t), "+m" (v->counter)					\
@@ -63,7 +61,6 @@ static inline int atomic_##op##_return_relaxed(int a, atomic_t *v) \ 
	__asm__ __volatile__(						\

"1:	lwarx	%0,0,%3		# atomic_" #op "_return_relaxed\n"	\

	#asm_op " %0,%2,%0\n"						\

	PPC405_ERR77(0, %3)						\

"	stwcx.	%0,0,%3\n"						\

"	bne-	1b\n"							\

	: "=&r" (t), "+m" (v->counter)					\
@@ -81,7 +78,6 @@ static inline int atomic_fetch_##op##_relaxed(int a, atomic_t *v) \ 
	__asm__ __volatile__(						\

"1:	lwarx	%0,0,%4		# atomic_fetch_" #op "_relaxed\n"	\

	#asm_op " %1,%3,%0\n"						\

	PPC405_ERR77(0, %4)						\

"	stwcx.	%1,0,%4\n"						\

"	bne-	1b\n"							\

	: "=&r" (res), "=&r" (t), "+m" (v->counter)			\
@@ -130,7 +126,6 @@ static __inline__ void atomic_inc(atomic_t *v) 
	__asm__ __volatile__(

"1:	lwarx	%0,0,%2		# atomic_inc\n\

	addic	%0,%0,1\n"

	PPC405_ERR77(0,%2)

"	stwcx.	%0,0,%2 \n\

	bne-	1b"

	: "=&r" (t), "+m" (v->counter)
@@ -146,7 +141,6 @@ static __inline__ int atomic_inc_return_relaxed(atomic_t *v) 
	__asm__ __volatile__(

"1:	lwarx	%0,0,%2		# atomic_inc_return_relaxed\n"

"	addic	%0,%0,1\n"

	PPC405_ERR77(0, %2)

"	stwcx.	%0,0,%2\n"

"	bne-	1b"

	: "=&r" (t), "+m" (v->counter)
@@ -163,7 +157,6 @@ static __inline__ void atomic_dec(atomic_t *v) 
	__asm__ __volatile__(

"1:	lwarx	%0,0,%2		# atomic_dec\n\

	addic	%0,%0,-1\n"

	PPC405_ERR77(0,%2)\

"	stwcx.	%0,0,%2\n\

	bne-	1b"

	: "=&r" (t), "+m" (v->counter)
@@ -179,7 +172,6 @@ static __inline__ int atomic_dec_return_relaxed(atomic_t *v) 
	__asm__ __volatile__(

"1:	lwarx	%0,0,%2		# atomic_dec_return_relaxed\n"

"	addic	%0,%0,-1\n"

	PPC405_ERR77(0, %2)

"	stwcx.	%0,0,%2\n"

"	bne-	1b"

	: "=&r" (t), "+m" (v->counter)
@@ -220,7 +212,6 @@ static __inline__ int atomic_fetch_add_unless(atomic_t *v, int a, int u) 
	cmpw	0,%0,%3 \n\

	beq	2f \n\

	add	%0,%2,%0 \n"

	PPC405_ERR77(0,%2)

"	stwcx.	%0,0,%1 \n\

	bne-	1b \n"

	PPC_ATOMIC_EXIT_BARRIER
@@ -251,7 +242,6 @@ static __inline__ int atomic_inc_not_zero(atomic_t *v) 
	cmpwi	0,%0,0\n\

	beq-	2f\n\

	addic	%1,%0,1\n"

	PPC405_ERR77(0,%2)

"	stwcx.	%1,0,%2\n\

	bne-	1b\n"

	PPC_ATOMIC_EXIT_BARRIER
@@ -280,7 +270,6 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v) 
	cmpwi	%0,1\n\

	addi	%0,%0,-1\n\

	blt-	2f\n"

	PPC405_ERR77(0,%1)

"	stwcx.	%0,0,%1\n\

	bne-	1b"

	PPC_ATOMIC_EXIT_BARRIER

arch/powerpc/include/asm/bitops.h

+0 −4
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ 
#include <linux/compiler.h>

#include <asm/asm-compat.h>

#include <asm/synch.h>

#include <asm/asm-405.h>



/* PPC bit number conversion */

#define PPC_BITLSHIFT(be)	(BITS_PER_LONG - 1 - (be))
@@ -73,7 +72,6 @@ static inline void fn(unsigned long mask, \ 
	prefix					\

"1:"	PPC_LLARX(%0,0,%3,0) "\n"		\

	stringify_in_c(op) "%0,%0,%2\n"		\

	PPC405_ERR77(0,%3)			\

	PPC_STLCX "%0,0,%3\n"			\

	"bne- 1b\n"				\

	: "=&r" (old), "+m" (*p)		\
@@ -119,7 +117,6 @@ static inline unsigned long fn( \ 
	prefix						\

"1:"	PPC_LLARX(%0,0,%3,eh) "\n"			\

	stringify_in_c(op) "%1,%0,%2\n"			\

	PPC405_ERR77(0,%3)				\

	PPC_STLCX "%1,0,%3\n"				\

	"bne- 1b\n"					\

	postfix						\
@@ -175,7 +172,6 @@ clear_bit_unlock_return_word(int nr, volatile unsigned long *addr) 
	PPC_RELEASE_BARRIER

"1:"	PPC_LLARX(%0,0,%3,0) "\n"

	"andc %1,%0,%2\n"

	PPC405_ERR77(0,%3)

	PPC_STLCX "%1,0,%3\n"

	"bne- 1b\n"

	: "=&r" (old), "=&r" (t)

arch/powerpc/include/asm/cmpxchg.h

+0 −11
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@ 
#include <linux/compiler.h>

#include <asm/synch.h>

#include <linux/bug.h>

#include <asm/asm-405.h>



#ifdef __BIG_ENDIAN

#define BITOFF_CAL(size, off)	((sizeof(u32) - size - off) * BITS_PER_BYTE)
@@ -29,7 +28,6 @@ static inline u32 __xchg_##type##sfx(volatile void *p, u32 val) \ 
"1:	lwarx   %0,0,%3\n"					\

"	andc	%1,%0,%5\n"					\

"	or	%1,%1,%4\n"					\

	PPC405_ERR77(0,%3)					\

"	stwcx.	%1,0,%3\n"					\

"	bne-	1b\n"						\

	: "=&r" (prev), "=&r" (tmp), "+m" (*(u32*)p)		\
@@ -60,7 +58,6 @@ u32 __cmpxchg_##type##sfx(volatile void *p, u32 old, u32 new) \ 
"	bne-	2f\n"						\

"	andc	%1,%0,%6\n"					\

"	or	%1,%1,%5\n"					\

	PPC405_ERR77(0,%3)					\

"	stwcx.  %1,0,%3\n"					\

"	bne-    1b\n"						\

	br2							\
@@ -92,7 +89,6 @@ __xchg_u32_local(volatile void *p, unsigned long val) 


	__asm__ __volatile__(

"1:	lwarx	%0,0,%2 \n"

	PPC405_ERR77(0,%2)

"	stwcx.	%3,0,%2 \n\

	bne-	1b"

	: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
@@ -109,7 +105,6 @@ __xchg_u32_relaxed(u32 *p, unsigned long val) 


	__asm__ __volatile__(

"1:	lwarx	%0,0,%2\n"

	PPC405_ERR77(0, %2)

"	stwcx.	%3,0,%2\n"

"	bne-	1b"

	: "=&r" (prev), "+m" (*p)
@@ -127,7 +122,6 @@ __xchg_u64_local(volatile void *p, unsigned long val) 


	__asm__ __volatile__(

"1:	ldarx	%0,0,%2 \n"

	PPC405_ERR77(0,%2)

"	stdcx.	%3,0,%2 \n\

	bne-	1b"

	: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
@@ -144,7 +138,6 @@ __xchg_u64_relaxed(u64 *p, unsigned long val) 


	__asm__ __volatile__(

"1:	ldarx	%0,0,%2\n"

	PPC405_ERR77(0, %2)

"	stdcx.	%3,0,%2\n"

"	bne-	1b"

	: "=&r" (prev), "+m" (*p)
@@ -229,7 +222,6 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) 
"1:	lwarx	%0,0,%2		# __cmpxchg_u32\n\

	cmpw	0,%0,%3\n\

	bne-	2f\n"

	PPC405_ERR77(0,%2)

"	stwcx.	%4,0,%2\n\

	bne-	1b"

	PPC_ATOMIC_EXIT_BARRIER
@@ -252,7 +244,6 @@ __cmpxchg_u32_local(volatile unsigned int *p, unsigned long old, 
"1:	lwarx	%0,0,%2		# __cmpxchg_u32\n\

	cmpw	0,%0,%3\n\

	bne-	2f\n"

	PPC405_ERR77(0,%2)

"	stwcx.	%4,0,%2\n\

	bne-	1b"

	"\n\
@@ -273,7 +264,6 @@ __cmpxchg_u32_relaxed(u32 *p, unsigned long old, unsigned long new) 
"1:	lwarx	%0,0,%2		# __cmpxchg_u32_relaxed\n"

"	cmpw	0,%0,%3\n"

"	bne-	2f\n"

	PPC405_ERR77(0, %2)

"	stwcx.	%4,0,%2\n"

"	bne-	1b\n"

"2:"
@@ -301,7 +291,6 @@ __cmpxchg_u32_acquire(u32 *p, unsigned long old, unsigned long new) 
"1:	lwarx	%0,0,%2		# __cmpxchg_u32_acquire\n"

"	cmpw	0,%0,%3\n"

"	bne-	2f\n"

	PPC405_ERR77(0, %2)

"	stwcx.	%4,0,%2\n"

"	bne-	1b\n"

	PPC_ACQUIRE_BARRIER

arch/powerpc/include/asm/futex.h

+0 −3
Original line number Diff line number Diff line
@@ -8,14 +8,12 @@ 
#include <linux/uaccess.h>

#include <asm/errno.h>

#include <asm/synch.h>

#include <asm/asm-405.h>



#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \

  __asm__ __volatile ( \

	PPC_ATOMIC_ENTRY_BARRIER \

"1:	lwarx	%0,0,%2\n" \

	insn \

	PPC405_ERR77(0, %2) \

"2:	stwcx.	%1,0,%2\n" \

	"bne-	1b\n" \

	PPC_ATOMIC_EXIT_BARRIER \
@@ -82,7 +80,6 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, 
"1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\

        cmpw    0,%1,%4\n\

        bne-    3f\n"

        PPC405_ERR77(0,%3)

"2:     stwcx.  %5,0,%3\n\

        bne-    1b\n"

        PPC_ATOMIC_EXIT_BARRIER

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