Commit 44de76b6 authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge tag 'keystone-fixes-non-critical' of... 

Merge tag 'keystone-fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/fixes-non-critical

From: Santosh Shilimkar <santosh.shilimkar@ti.com>:
ARM: keystone: non-critical fixes, cleanup for 3.12

Summary of changes:
	- Drop unused HAVE_SCHED_CLOCK config option
	- Remove now redundant smp_init_cpus call
	- Update the smc code to remove dsb and r12 usage
	- Convert device tree to use #include and GIC bindings

* tag 'keystone-fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone

:
  ARM: Keystone: Convert device tree file to use IRQ defines
  ARM: keystone: use #include to include skeleton.dtsi
  ARM: keystone: Drop the un-necessary dsb from keystone_cpu_smc()
  ARM: Keystone: No need to preserve r12 across smc call
  ARM: keystone: remove redundant smp_init_cpus definition
  ARM: keystone: drop useless HAVE_SCHED_CLOCK

Signed-off-by: default avatarKevin Hilman <khilman@linaro.org>
parents 6a33fc8c eb788f43

arch/arm/boot/dts/keystone.dts

+18 −11
Original line number Diff line number Diff line
@@ -7,7 +7,9 @@ 
 */



/dts-v1/;

/include/ "skeleton.dtsi"

#include <dt-bindings/interrupt-controller/arm-gic.h>



#include "skeleton.dtsi"



/ {

	model = "Texas Instruments Keystone 2 SoC";
@@ -67,18 +69,23 @@ 


	timer {

		compatible = "arm,armv7-timer";

		interrupts = <1 13 0xf08>,

			     <1 14 0xf08>,

			     <1 11 0xf08>,

			     <1 10 0x308>;

		interrupts =

			<GIC_PPI 13

				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			<GIC_PPI 14

				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			<GIC_PPI 11

				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			<GIC_PPI 10

				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

	};



	pmu {

		compatible = "arm,cortex-a15-pmu";

		interrupts = <0 20 0xf01>,

			     <0 21 0xf01>,

			     <0 22 0xf01>,

			     <0 23 0xf01>;

		interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;

	};



	soc {
@@ -100,7 +107,7 @@ 
			reg-io-width = <4>;

			reg = <0x02530c00 0x100>;

			clock-frequency = <133120000>;

			interrupts = <0 277 0xf01>;

			interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;

		};



		uart1:	serial@02531000 {
@@ -110,7 +117,7 @@ 
			reg-io-width = <4>;

			reg = <0x02531000 0x100>;

			clock-frequency = <133120000>;

			interrupts = <0 280 0xf01>;

			interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;

		};



	};

arch/arm/mach-keystone/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -7,7 +7,6 @@ config ARCH_KEYSTONE 
	select HAVE_SMP

	select CLKSRC_MMIO

	select GENERIC_CLOCKEVENTS

	select HAVE_SCHED_CLOCK

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select ARM_ERRATA_798181 if SMP

	help

arch/arm/mach-keystone/platsmp.c

+0 −1
Original line number Diff line number Diff line
@@ -38,6 +38,5 @@ static int keystone_smp_boot_secondary(unsigned int cpu, 
}



struct smp_operations keystone_smp_ops __initdata = {

	.smp_init_cpus		= arm_dt_init_cpu_maps,

	.smp_boot_secondary	= keystone_smp_boot_secondary,

};

arch/arm/mach-keystone/smc.S

+2 −3
Original line number Diff line number Diff line
@@ -22,8 +22,7 @@ 
 * Return: Non zero value on failure

 */

ENTRY(keystone_cpu_smc)

	stmfd   sp!, {r4-r12, lr}

	stmfd   sp!, {r4-r11, lr}

	smc	#0

	dsb

	ldmfd   sp!, {r4-r12, pc}

	ldmfd   sp!, {r4-r11, pc}

ENDPROC(keystone_cpu_smc)

CRA Git | Maintained and supported by SUSTech CRA and CCSE