Commit 44dd5efc authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'Support-programmable-pins-for-Ocelot-PTP-driver' 



Yangbo Lu says:

====================
Support programmable pins for Ocelot PTP driver

The Ocelot PTP clock driver had been embedded into ocelot.c driver.
It had supported basic gettime64/settime64/adjtime/adjfine functions
by now which were used by both Ocelot switch and Felix switch.

This patch-set is to move current ptp clock code out of ocelot.c driver
maintaining as a single ocelot_ptp.c driver, and to implement 4
programmable pins with only PTP_PF_PEROUT function for now.
The PTP_PF_EXTTS function will be supported in the future, and it should
be implemented separately for Felix and Ocelot, because of different
hardware interrupt implementation in them.

Changes for v2:
	- Put PTP driver under drivers/net/ethernet/mscc/.
	- Dropped MAINTAINERS patch. Kept original maintaining.
	- Initialized PTP separately in ocelot/felix platforms.
	- Supported PPS case in programmable pin.
	- Supported disabling pin function since deadlock is fixed by Richard.
	- Returned -EBUSY if not finding pin available.
Changes for v3:
	- Re-sent.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 59211053 5287be40

drivers/net/dsa/ocelot/felix.c

+27 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <soc/mscc/ocelot_sys.h>

#include <soc/mscc/ocelot_dev.h>

#include <soc/mscc/ocelot_ana.h>

#include <soc/mscc/ocelot_ptp.h>

#include <soc/mscc/ocelot.h>

#include <linux/packing.h>

#include <linux/module.h>
@@ -494,6 +495,23 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports) 
	return 0;

}



static struct ptp_clock_info ocelot_ptp_clock_info = {

	.owner		= THIS_MODULE,

	.name		= "felix ptp",

	.max_adj	= 0x7fffffff,

	.n_alarm	= 0,

	.n_ext_ts	= 0,

	.n_per_out	= OCELOT_PTP_PINS_NUM,

	.n_pins		= OCELOT_PTP_PINS_NUM,

	.pps		= 0,

	.gettime64	= ocelot_ptp_gettime64,

	.settime64	= ocelot_ptp_settime64,

	.adjtime	= ocelot_ptp_adjtime,

	.adjfine	= ocelot_ptp_adjfine,

	.verify		= ocelot_ptp_verify,

	.enable		= ocelot_ptp_enable,

};



/* Hardware initialization done here so that we can allocate structures with

 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing

 * us to allocate structures twice (leak memory) and map PCI memory twice
@@ -510,6 +528,14 @@ static int felix_setup(struct dsa_switch *ds) 
		return err;



	ocelot_init(ocelot);

	if (ocelot->ptp) {

		err = ocelot_init_timestamp(ocelot, &ocelot_ptp_clock_info);

		if (err) {

			dev_err(ocelot->dev,

				"Timestamp initialization failed\n");

			ocelot->ptp = 0;

		}

	}



	for (port = 0; port < ds->num_ports; port++) {

		ocelot_init_port(ocelot, port);
@@ -548,6 +574,7 @@ static void felix_teardown(struct dsa_switch *ds) 
	if (felix->info->mdio_bus_free)

		felix->info->mdio_bus_free(ocelot);



	ocelot_deinit_timestamp(ocelot);

	/* stop workqueue thread */

	ocelot_deinit(ocelot);

}

drivers/net/dsa/ocelot/felix_vsc9959.c

+2 −0
Original line number Diff line number Diff line
@@ -313,6 +313,8 @@ static const u32 vsc9959_ptp_regmap[] = { 
	REG(PTP_PIN_TOD_SEC_MSB,           0x000004),

	REG(PTP_PIN_TOD_SEC_LSB,           0x000008),

	REG(PTP_PIN_TOD_NSEC,              0x00000c),

	REG(PTP_PIN_WF_HIGH_PERIOD,        0x000014),

	REG(PTP_PIN_WF_LOW_PERIOD,         0x000018),

	REG(PTP_CFG_MISC,                  0x0000a0),

	REG(PTP_CLK_CFG_ADJ_CFG,           0x0000a4),

	REG(PTP_CLK_CFG_ADJ_FREQ,          0x0000a8),

drivers/net/ethernet/mscc/Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR MIT)

obj-$(CONFIG_MSCC_OCELOT_SWITCH) += mscc_ocelot_common.o

mscc_ocelot_common-y := ocelot.o ocelot_io.o

mscc_ocelot_common-y += ocelot_regs.o ocelot_tc.o ocelot_police.o ocelot_ace.o ocelot_flower.o

mscc_ocelot_common-y += ocelot_regs.o ocelot_tc.o ocelot_police.o ocelot_ace.o ocelot_flower.o ocelot_ptp.o

obj-$(CONFIG_MSCC_OCELOT_SWITCH_OCELOT) += ocelot_board.o

drivers/net/ethernet/mscc/ocelot.c

+6 −206
Original line number Diff line number Diff line
@@ -14,7 +14,6 @@ 
#include <linux/module.h>

#include <linux/netdevice.h>

#include <linux/phy.h>

#include <linux/ptp_clock_kernel.h>

#include <linux/skbuff.h>

#include <linux/iopoll.h>

#include <net/arp.h>
@@ -1350,6 +1349,12 @@ int ocelot_get_ts_info(struct ocelot *ocelot, int port, 
{

	info->phc_index = ocelot->ptp_clock ?

			  ptp_clock_index(ocelot->ptp_clock) : -1;

	if (info->phc_index == -1) {

		info->so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |

					 SOF_TIMESTAMPING_RX_SOFTWARE |

					 SOF_TIMESTAMPING_SOFTWARE;

		return 0;

	}

	info->so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |

				 SOF_TIMESTAMPING_RX_SOFTWARE |

				 SOF_TIMESTAMPING_SOFTWARE |
@@ -1991,200 +1996,6 @@ struct notifier_block ocelot_switchdev_blocking_nb __read_mostly = { 
};

EXPORT_SYMBOL(ocelot_switchdev_blocking_nb);



int ocelot_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts)

{

	struct ocelot *ocelot = container_of(ptp, struct ocelot, ptp_info);

	unsigned long flags;

	time64_t s;

	u32 val;

	s64 ns;



	spin_lock_irqsave(&ocelot->ptp_clock_lock, flags);



	val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN);

	val &= ~(PTP_PIN_CFG_SYNC | PTP_PIN_CFG_ACTION_MASK | PTP_PIN_CFG_DOM);

	val |= PTP_PIN_CFG_ACTION(PTP_PIN_ACTION_SAVE);

	ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN);



	s = ocelot_read_rix(ocelot, PTP_PIN_TOD_SEC_MSB, TOD_ACC_PIN) & 0xffff;

	s <<= 32;

	s += ocelot_read_rix(ocelot, PTP_PIN_TOD_SEC_LSB, TOD_ACC_PIN);

	ns = ocelot_read_rix(ocelot, PTP_PIN_TOD_NSEC, TOD_ACC_PIN);



	spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags);



	/* Deal with negative values */

	if (ns >= 0x3ffffff0 && ns <= 0x3fffffff) {

		s--;

		ns &= 0xf;

		ns += 999999984;

	}



	set_normalized_timespec64(ts, s, ns);

	return 0;

}

EXPORT_SYMBOL(ocelot_ptp_gettime64);



static int ocelot_ptp_settime64(struct ptp_clock_info *ptp,

				const struct timespec64 *ts)

{

	struct ocelot *ocelot = container_of(ptp, struct ocelot, ptp_info);

	unsigned long flags;

	u32 val;



	spin_lock_irqsave(&ocelot->ptp_clock_lock, flags);



	val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN);

	val &= ~(PTP_PIN_CFG_SYNC | PTP_PIN_CFG_ACTION_MASK | PTP_PIN_CFG_DOM);

	val |= PTP_PIN_CFG_ACTION(PTP_PIN_ACTION_IDLE);



	ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN);



	ocelot_write_rix(ocelot, lower_32_bits(ts->tv_sec), PTP_PIN_TOD_SEC_LSB,

			 TOD_ACC_PIN);

	ocelot_write_rix(ocelot, upper_32_bits(ts->tv_sec), PTP_PIN_TOD_SEC_MSB,

			 TOD_ACC_PIN);

	ocelot_write_rix(ocelot, ts->tv_nsec, PTP_PIN_TOD_NSEC, TOD_ACC_PIN);



	val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN);

	val &= ~(PTP_PIN_CFG_SYNC | PTP_PIN_CFG_ACTION_MASK | PTP_PIN_CFG_DOM);

	val |= PTP_PIN_CFG_ACTION(PTP_PIN_ACTION_LOAD);



	ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN);



	spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags);

	return 0;

}



static int ocelot_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)

{

	if (delta > -(NSEC_PER_SEC / 2) && delta < (NSEC_PER_SEC / 2)) {

		struct ocelot *ocelot = container_of(ptp, struct ocelot, ptp_info);

		unsigned long flags;

		u32 val;



		spin_lock_irqsave(&ocelot->ptp_clock_lock, flags);



		val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN);

		val &= ~(PTP_PIN_CFG_SYNC | PTP_PIN_CFG_ACTION_MASK | PTP_PIN_CFG_DOM);

		val |= PTP_PIN_CFG_ACTION(PTP_PIN_ACTION_IDLE);



		ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN);



		ocelot_write_rix(ocelot, 0, PTP_PIN_TOD_SEC_LSB, TOD_ACC_PIN);

		ocelot_write_rix(ocelot, 0, PTP_PIN_TOD_SEC_MSB, TOD_ACC_PIN);

		ocelot_write_rix(ocelot, delta, PTP_PIN_TOD_NSEC, TOD_ACC_PIN);



		val = ocelot_read_rix(ocelot, PTP_PIN_CFG, TOD_ACC_PIN);

		val &= ~(PTP_PIN_CFG_SYNC | PTP_PIN_CFG_ACTION_MASK | PTP_PIN_CFG_DOM);

		val |= PTP_PIN_CFG_ACTION(PTP_PIN_ACTION_DELTA);



		ocelot_write_rix(ocelot, val, PTP_PIN_CFG, TOD_ACC_PIN);



		spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags);

	} else {

		/* Fall back using ocelot_ptp_settime64 which is not exact. */

		struct timespec64 ts;

		u64 now;



		ocelot_ptp_gettime64(ptp, &ts);



		now = ktime_to_ns(timespec64_to_ktime(ts));

		ts = ns_to_timespec64(now + delta);



		ocelot_ptp_settime64(ptp, &ts);

	}

	return 0;

}



static int ocelot_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)

{

	struct ocelot *ocelot = container_of(ptp, struct ocelot, ptp_info);

	u32 unit = 0, direction = 0;

	unsigned long flags;

	u64 adj = 0;



	spin_lock_irqsave(&ocelot->ptp_clock_lock, flags);



	if (!scaled_ppm)

		goto disable_adj;



	if (scaled_ppm < 0) {

		direction = PTP_CFG_CLK_ADJ_CFG_DIR;

		scaled_ppm = -scaled_ppm;

	}



	adj = PSEC_PER_SEC << 16;

	do_div(adj, scaled_ppm);

	do_div(adj, 1000);



	/* If the adjustment value is too large, use ns instead */

	if (adj >= (1L << 30)) {

		unit = PTP_CFG_CLK_ADJ_FREQ_NS;

		do_div(adj, 1000);

	}



	/* Still too big */

	if (adj >= (1L << 30))

		goto disable_adj;



	ocelot_write(ocelot, unit | adj, PTP_CLK_CFG_ADJ_FREQ);

	ocelot_write(ocelot, PTP_CFG_CLK_ADJ_CFG_ENA | direction,

		     PTP_CLK_CFG_ADJ_CFG);



	spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags);

	return 0;



disable_adj:

	ocelot_write(ocelot, 0, PTP_CLK_CFG_ADJ_CFG);



	spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags);

	return 0;

}



static struct ptp_clock_info ocelot_ptp_clock_info = {

	.owner		= THIS_MODULE,

	.name		= "ocelot ptp",

	.max_adj	= 0x7fffffff,

	.n_alarm	= 0,

	.n_ext_ts	= 0,

	.n_per_out	= 0,

	.n_pins		= 0,

	.pps		= 0,

	.gettime64	= ocelot_ptp_gettime64,

	.settime64	= ocelot_ptp_settime64,

	.adjtime	= ocelot_ptp_adjtime,

	.adjfine	= ocelot_ptp_adjfine,

};



static int ocelot_init_timestamp(struct ocelot *ocelot)

{

	struct ptp_clock *ptp_clock;



	ocelot->ptp_info = ocelot_ptp_clock_info;

	ptp_clock = ptp_clock_register(&ocelot->ptp_info, ocelot->dev);

	if (IS_ERR(ptp_clock))

		return PTR_ERR(ptp_clock);

	/* Check if PHC support is missing at the configuration level */

	if (!ptp_clock)

		return 0;



	ocelot->ptp_clock = ptp_clock;



	ocelot_write(ocelot, SYS_PTP_CFG_PTP_STAMP_WID(30), SYS_PTP_CFG);

	ocelot_write(ocelot, 0xffffffff, ANA_TABLES_PTP_ID_LOW);

	ocelot_write(ocelot, 0xffffffff, ANA_TABLES_PTP_ID_HIGH);



	ocelot_write(ocelot, PTP_CFG_MISC_PTP_EN, PTP_CFG_MISC);



	/* There is no device reconfiguration, PTP Rx stamping is always

	 * enabled.

	 */

	ocelot->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;



	return 0;

}



/* Configure the maximum SDU (L2 payload) on RX to the value specified in @sdu.

 * The length of VLAN tags is accounted for automatically via DEV_MAC_TAGS_CFG.

 * In the special case that it's the NPI port that we're configuring, the
@@ -2530,15 +2341,6 @@ int ocelot_init(struct ocelot *ocelot) 
	queue_delayed_work(ocelot->stats_queue, &ocelot->stats_work,

			   OCELOT_STATS_CHECK_DELAY);



	if (ocelot->ptp) {

		ret = ocelot_init_timestamp(ocelot);

		if (ret) {

			dev_err(ocelot->dev,

				"Timestamp initialization failed\n");

			return ret;

		}

	}



	return 0;

}

EXPORT_SYMBOL(ocelot_init);
@@ -2551,8 +2353,6 @@ void ocelot_deinit(struct ocelot *ocelot) 
	cancel_delayed_work(&ocelot->stats_work);

	destroy_workqueue(ocelot->stats_queue);

	mutex_destroy(&ocelot->stats_lock);

	if (ocelot->ptp_clock)

		ptp_clock_unregister(ocelot->ptp_clock);



	for (i = 0; i < ocelot->num_phys_ports; i++) {

		port = ocelot->ports[i];

drivers/net/ethernet/mscc/ocelot.h

+1 −2
Original line number Diff line number Diff line
@@ -15,18 +15,17 @@ 
#include <linux/phy.h>

#include <linux/phy/phy.h>

#include <linux/platform_device.h>

#include <linux/ptp_clock_kernel.h>

#include <linux/regmap.h>



#include <soc/mscc/ocelot_qsys.h>

#include <soc/mscc/ocelot_sys.h>

#include <soc/mscc/ocelot_dev.h>

#include <soc/mscc/ocelot_ana.h>

#include <soc/mscc/ocelot_ptp.h>

#include <soc/mscc/ocelot.h>

#include "ocelot_rew.h"

#include "ocelot_qs.h"

#include "ocelot_tc.h"

#include "ocelot_ptp.h"



#define OCELOT_BUFFER_CELL_SZ 60

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