Commit 4422d80e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull RAS updates from Thomas Gleixner:
 "The RAS updates for the 4.13 merge window:

   - Cleanup of the MCE injection facility (Borsilav Petkov)

   - Rework of the AMD/SMCA handling (Yazen Ghannam)

   - Enhancements for ACPI/APEI to handle new notitication types (Shiju
     Jose)

   - atomic_t to refcount_t conversion (Elena Reshetova)

   - A few fixes and enhancements all over the place"

* 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  RAS/CEC: Check the correct variable in the debugfs error handling
  x86/mce: Always save severity in machine_check_poll()
  x86/MCE, xen/mcelog: Make /dev/mcelog registration messages more precise
  x86/mce: Update bootlog description to reflect behavior on AMD
  x86/mce: Don't disable MCA banks when offlining a CPU on AMD
  x86/mce/mce-inject: Preset the MCE injection struct
  x86/mce: Clean up include files
  x86/mce: Get rid of register_mce_write_callback()
  x86/mce: Merge mce_amd_inj into mce-inject
  x86/mce/AMD: Use saved threshold block info in interrupt handler
  x86/mce/AMD: Use msr_stat when clearing MCA_STATUS
  x86/mce/AMD: Carve out SMCA bank configuration
  x86/mce/AMD: Redo error logging from APIC LVT interrupt handlers
  x86/mce: Convert threshold_bank.cpus from atomic_t to refcount_t
  RAS: Make local function parse_ras_param() static
  ACPI/APEI: Handle GSIV and GPIO notification types
parents 9a9594ef 32288daf

Documentation/x86/x86_64/boot-options.txt

+2 −1
Original line number Diff line number Diff line
@@ -36,7 +36,8 @@ Machine check 
		to broadcast MCEs.

   mce=bootlog

		Enable logging of machine checks left over from booting.

		Disabled by default on AMD because some BIOS leave bogus ones.

		Disabled by default on AMD Fam10h and older because some BIOS

		leave bogus ones.

		If your BIOS doesn't do that it's a good idea to enable though

		to make sure you log even machine check events that result

		in a reboot. On Intel systems it is enabled by default.

arch/x86/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -1085,7 +1085,7 @@ config X86_MCE_THRESHOLD 
	def_bool y



config X86_MCE_INJECT

	depends on X86_MCE && X86_LOCAL_APIC && X86_MCELOG_LEGACY

	depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS

	tristate "Machine check injector support"

	---help---

	  Provide support for injecting machine checks for testing purposes.

arch/x86/Makefile

+0 −2
Original line number Diff line number Diff line
@@ -257,8 +257,6 @@ drivers-$(CONFIG_PM) += arch/x86/power/ 


drivers-$(CONFIG_FB) += arch/x86/video/



drivers-$(CONFIG_RAS) += arch/x86/ras/



####

# boot loader support. Several targets are kept for legacy purposes

arch/x86/include/asm/amd_nb.h

+2 −1
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 


#include <linux/ioport.h>

#include <linux/pci.h>

#include <linux/refcount.h>



struct amd_nb_bus_dev_range {

	u8 bus;
@@ -55,7 +56,7 @@ struct threshold_bank { 
	struct threshold_block	*blocks;



	/* initialized to the number of CPUs on the node sharing this bank */

	atomic_t		cpus;

	refcount_t		cpus;

};



struct amd_northbridge {

arch/x86/include/asm/mce.h

+0 −4
Original line number Diff line number Diff line
@@ -285,10 +285,6 @@ int mce_notify_irq(void); 


DECLARE_PER_CPU(struct mce, injectm);



extern void register_mce_write_callback(ssize_t (*)(struct file *filp,

				    const char __user *ubuf,

				    size_t usize, loff_t *off));



/* Disable CMCI/polling for MCA bank claimed by firmware */

extern void mce_disable_bank(int bank);

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