Commit 43ee7448 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'irqchip-5.6' of... 

Merge tag 'irqchip-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier:

- Conversion of the SiFive PLIC to hierarchical domains
- New SiFive GPIO irqchip driver
- New Aspeed SCI irqchip driver
- New NXP INTMUX irqchip driver
- Additional support for the Meson A1 GPIO irqchip
- First part of the GICv4.1 support
- Assorted fixes
parents 11ea68f5 f4a81f5a

Documentation/devicetree/bindings/gpio/sifive,gpio.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: SiFive GPIO controller



maintainers:

  - Yash Shah <yash.shah@sifive.com>

  - Paul Walmsley <paul.walmsley@sifive.com>



properties:

  compatible:

    items:

      - const: sifive,fu540-c000-gpio

      - const: sifive,gpio0



  reg:

    maxItems: 1



  interrupts:

    description:

      interrupt mapping one per GPIO. Maximum 16 GPIOs.

    minItems: 1

    maxItems: 16



  interrupt-controller: true



  "#interrupt-cells":

    const: 2



  clocks:

    maxItems: 1



  "#gpio-cells":

    const: 2



  gpio-controller: true



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - "#interrupt-cells"

  - clocks

  - "#gpio-cells"

  - gpio-controller



additionalProperties: false



examples:

  - |

      #include <dt-bindings/clock/sifive-fu540-prci.h>

      gpio@10060000 {

        compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";

        interrupt-parent = <&plic>;

        interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>;

        reg = <0x0 0x10060000 0x0 0x1000>;

        clocks = <&tlclk PRCI_CLK_TLCLK>;

        gpio-controller;

        #gpio-cells = <2>;

        interrupt-controller;

        #interrupt-cells = <2>;

      };



...

Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt

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@@ -17,6 +17,7 @@ Required properties: 
    "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)

    "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)

    "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)

    "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells : Specifies the number of cells needed to encode an

Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt

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Aspeed AST25XX and AST26XX SCU Interrupt Controller



Required Properties:

 - #interrupt-cells		: must be 1

 - compatible			: must be "aspeed,ast2500-scu-ic",

				  "aspeed,ast2600-scu-ic0" or

				  "aspeed,ast2600-scu-ic1"

 - interrupts			: interrupt from the parent controller

 - interrupt-controller		: indicates that the controller receives and

				  fires new interrupts for child busses



Example:



    syscon@1e6e2000 {

        ranges = <0 0x1e6e2000 0x1a8>;



        scu_ic: interrupt-controller@18 {

            #interrupt-cells = <1>;

            compatible = "aspeed,ast2500-scu-ic";

            interrupts = <21>;

            interrupt-controller;

        };

    };

Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/fsl,intmux.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale INTMUX interrupt multiplexer



maintainers:

  - Joakim Zhang <qiangqing.zhang@nxp.com>



properties:

  compatible:

    const: fsl,imx-intmux



  reg:

    maxItems: 1



  interrupts:

    minItems: 1

    maxItems: 8

    description: |

      Should contain the parent interrupt lines (up to 8) used to multiplex

      the input interrupts.



  interrupt-controller: true



  '#interrupt-cells':

    const: 2

    description: |

      The 1st cell is hw interrupt number, the 2nd cell is channel index.



  clocks:

    description: ipg clock.



  clock-names:

    const: ipg



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - '#interrupt-cells'

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    interrupt-controller@37400000 {

        compatible = "fsl,imx-intmux";

        reg = <0x37400000 0x1000>;

        interrupts = <0 16 4>,

                     <0 17 4>,

                     <0 18 4>,

                     <0 19 4>,

                     <0 20 4>,

                     <0 21 4>,

                     <0 22 4>,

                     <0 23 4>;

        interrupt-controller;

        interrupt-parent = <&gic>;

        #interrupt-cells = <2>;

        clocks = <&clk>;

        clock-names = "ipg";

    };

MAINTAINERS

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@@ -2694,6 +2694,14 @@ S: Maintained 
F:	drivers/pinctrl/aspeed/

F:	Documentation/devicetree/bindings/pinctrl/aspeed,*













ASPEED SCU INTERRUPT CONTROLLER DRIVER













M:	Eddie James <eajames@linux.ibm.com>













L:	linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)













S:	Maintained













F:	Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt













F:	drivers/irqchip/irq-aspeed-scu-ic.c













F:	include/dt-bindings/interrupt-controller/aspeed-scu-ic.h



























ASPEED VIDEO ENGINE DRIVER















M:	Eddie James <eajames@linux.ibm.com>















L:	linux-media@vger.kernel.org









































































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