Commit 43c16408 authored by Andrew Patterson's avatar Andrew Patterson Committed by Jesse Barnes
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PCI: Add support for turning PCIe ECRC on or off 



Adds support for PCI Express transaction layer end-to-end CRC checking
(ECRC).  This patch will enable/disable ECRC checking by setting/clearing
the ECRC Check Enable and/or ECRC Generation Enable bits for devices that
support ECRC.

The ECRC setting is controlled by the "pci=ecrc=<policy>" command-line
option. If this option is not set or is set to 'bios", the enable and
generation bits are left in whatever state that firmware/BIOS set them to.
The "off" setting turns them off, and the "on" option turns them on (if the
device supports it).

Turning ECRC on or off can be a data integrity versus performance
tradeoff.  In theory, turning it on will catch more data errors, turning
it off means possibly better performance since CRC does not need to be
calculated by the PCIe hardware and packet sizes are reduced.

Signed-off-by: default avatarAndrew Patterson <andrew.patterson@hp.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent f62795f1

Documentation/kernel-parameters.txt

+6 −0
Original line number Diff line number Diff line
@@ -1824,6 +1824,12 @@ and is between 256 and 4096 characters. It is defined in the file 
				PAGE_SIZE is used as alignment.

				PCI-PCI bridge can be specified, if resource

				windows need to be expanded.

		ecrc=		Enable/disable PCIe ECRC (transaction layer

				end-to-end CRC checking).

				bios: Use BIOS/firmware settings. This is the

				the default.

				off: Turn ECRC off

				on: Turn ECRC on.



	pcie_aspm=	[PCIE] Forcibly enable or disable PCIe Active State Power

			Management.

drivers/pci/pci.c

+2 −0
Original line number Diff line number Diff line
@@ -2588,6 +2588,8 @@ static int __init pci_setup(char *str) 
			} else if (!strncmp(str, "resource_alignment=", 19)) {

				pci_set_resource_alignment_param(str + 19,

							strlen(str + 19));

			} else if (!strncmp(str, "ecrc=", 5)) {

				pcie_ecrc_get_policy(str + 5);

			} else {

				printk(KERN_ERR "PCI: Unknown option `%s'\n",

						str);

drivers/pci/pcie/aer/Kconfig

+13 −0
Original line number Diff line number Diff line
@@ -10,3 +10,16 @@ config PCIEAER 
	  This enables PCI Express Root Port Advanced Error Reporting

	  (AER) driver support. Error reporting messages sent to Root

	  Port will be handled by PCI Express AER driver.





#

# PCI Express ECRC

#

config PCIE_ECRC

	bool "PCI Express ECRC settings control"

	depends on PCIEAER

	help

	  Used to override firmware/bios settings for PCI Express ECRC

	  (transaction layer end-to-end CRC checking).



	  When in doubt, say N.

drivers/pci/pcie/aer/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -4,6 +4,8 @@ 


obj-$(CONFIG_PCIEAER) += aerdriver.o



obj-$(CONFIG_PCIE_ECRC)	+= ecrc.o



aerdriver-objs := aerdrv_errprint.o aerdrv_core.o aerdrv.o

aerdriver-$(CONFIG_ACPI) += aerdrv_acpi.o

drivers/pci/pcie/aer/aerdrv_core.c

+9 −7
Original line number Diff line number Diff line
@@ -113,17 +113,19 @@ static void set_device_error_reporting(struct pci_dev *dev, void *data) 
{

	bool enable = *((bool *)data);



	if (dev->pcie_type != PCIE_RC_PORT &&

	    dev->pcie_type != PCIE_SW_UPSTREAM_PORT &&

	    dev->pcie_type != PCIE_SW_DOWNSTREAM_PORT)

		return;



	if (dev->pcie_type == PCIE_RC_PORT ||

	    dev->pcie_type == PCIE_SW_UPSTREAM_PORT ||

	    dev->pcie_type == PCIE_SW_DOWNSTREAM_PORT) {

		if (enable)

			pci_enable_pcie_error_reporting(dev);

		else

			pci_disable_pcie_error_reporting(dev);

	}



	if (enable)

		pcie_set_ecrc_checking(dev);

}



/**

 * set_downstream_devices_error_reporting - enable/disable the error reporting  bits on the root port and its downstream ports.

 * @dev: pointer to root port's pci_dev data structure

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