Commit 438caa3f authored by Amit Kucheria's avatar Amit Kucheria
Browse files

mxc: changes to common plat-mxc code to add support for i.MX5



Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.

Signed-off-by: default avatarAmit Kucheria <amit.kucheria@canonical.com>
parent 0f3332c4
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+9 −0
Original line number Diff line number Diff line
@@ -45,6 +45,15 @@
#define UART_VADDR	AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
#endif

#ifdef CONFIG_ARCH_MX5
#ifdef UART_PADDR
#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
#endif
#include <mach/mx51.h>
#define UART_PADDR	MX51_UART1_BASE_ADDR
#define UART_VADDR	MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
#endif

#ifdef CONFIG_ARCH_MXC91231
#ifdef UART_PADDR
#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
+4 −0
Original line number Diff line number Diff line
@@ -27,6 +27,10 @@
	 (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\
	 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0))

#ifdef CONFIG_ARCH_MX5
#include <mach/mx51.h>
#endif

#ifdef CONFIG_ARCH_MX3
#include <mach/mx3x.h>
#include <mach/mx31.h>
+3 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@
#define MXC_GPIO_IRQS		(32 * 3)
#elif defined CONFIG_ARCH_MX25
#define MXC_GPIO_IRQS		(32 * 4)
#elif defined CONFIG_ARCH_MX5
#define MXC_GPIO_IRQS		(32 * 4)
#elif defined CONFIG_ARCH_MXC91231
#define MXC_GPIO_IRQS		(32 * 4)
#endif
@@ -55,6 +57,7 @@
#else
#define MX3_IPU_IRQS 0
#endif
/* REVISIT: Add IPU irqs on IMX51 */

#define NR_IRQS			(MXC_IPU_IRQ_START + MX3_IPU_IRQS)

+3 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@
#define MX25_PHYS_OFFSET	UL(0x80000000)
#define MX27_PHYS_OFFSET	UL(0xa0000000)
#define MX3x_PHYS_OFFSET	UL(0x80000000)
#define MX51_PHYS_OFFSET	UL(0x90000000)
#define MXC91231_PHYS_OFFSET	UL(0x90000000)

#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
@@ -31,6 +32,8 @@
#  define PHYS_OFFSET		MX3x_PHYS_OFFSET
# elif defined CONFIG_ARCH_MXC91231
#  define PHYS_OFFSET		MXC91231_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX5
#  define PHYS_OFFSET		MX51_PHYS_OFFSET
# endif
#endif

+13 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@
#define MXC_CPU_MX27		27
#define MXC_CPU_MX31		31
#define MXC_CPU_MX35		35
#define MXC_CPU_MX51		51
#define MXC_CPU_MXC91231	91231

#ifndef __ASSEMBLY__
@@ -108,6 +109,18 @@ extern unsigned int __mxc_cpu_type;
# define cpu_is_mx35()		(0)
#endif

#ifdef CONFIG_ARCH_MX5
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
#  define mxc_cpu_type __mxc_cpu_type
# else
#  define mxc_cpu_type MXC_CPU_MX51
# endif
# define cpu_is_mx51()		(mxc_cpu_type == MXC_CPU_MX51)
#else
# define cpu_is_mx51()		(0)
#endif

#ifdef CONFIG_ARCH_MXC91231
# ifdef mxc_cpu_type
#  undef mxc_cpu_type
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