Commit 4369c5f3 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'clps711x/cleanup' into next/cleanup2 



Various cleanups for the clps711x platform from
Alexander Shiyan <shc_work@mail.ru> via email:

* clps711x/cleanup:
  ARM: clps711x: Remove board support for CEIVA
  ARM: clps711x: Fix register definitions
  ARM: clps711x: Fix lowlevel debug-macro
  ARM: clps711x: Added simple clock framework

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 9c0cc578 1c3a918f

arch/arm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -384,6 +384,8 @@ config ARCH_CLPS711X 
	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"

	select CPU_ARM720T

	select ARCH_USES_GETTIMEOFFSET

	select COMMON_CLK

	select CLKDEV_LOOKUP

	select NEED_MACH_MEMORY_H

	help

	  Support for Cirrus Logic 711x/721x/731x based boards.

arch/arm/mach-clps711x/Kconfig

+0 −6
Original line number Diff line number Diff line
@@ -16,12 +16,6 @@ config ARCH_CDB89712 
	  The board includes 2 serial ports, Ethernet, IRDA, and expansion

	  headers.  It comes with 16 MB SDRAM and 8 MB flash ROM.



config ARCH_CEIVA

	bool "CEIVA"

	help

	  Say Y here if you intend to run this kernel on the Ceiva/Polaroid

	  PhotoMax Digital Picture Frame.



config ARCH_CLEP7312

	bool "CLEP7312"

	help

arch/arm/mach-clps711x/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -9,7 +9,6 @@ obj-m := 
obj-n			:=

obj-			:=



obj-$(CONFIG_ARCH_CEIVA) += ceiva.o

obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o

obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o

obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o

arch/arm/mach-clps711x/ceiva.c

deleted100644 → 0
+0 −64
Original line number Diff line number Diff line 
/*

 *  linux/arch/arm/mach-clps711x/arch-ceiva.c

 *

 *  Copyright (C) 2002, Rob Scott <rscott@mtrob.fdns.net>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

#include <linux/init.h>

#include <linux/types.h>

#include <linux/string.h>



#include <asm/setup.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>



#include <linux/kernel.h>



#include <mach/hardware.h>

#include <asm/page.h>

#include <asm/pgtable.h>

#include <asm/sizes.h>



#include <asm/mach/map.h>



#include "common.h"



static struct map_desc ceiva_io_desc[] __initdata = {

 	/* SED1355 controlled video RAM & registers */

 	{

		.virtual	= CEIVA_VIRT_SED1355,

		.pfn		= __phys_to_pfn(CEIVA_PHYS_SED1355),

		.length		= SZ_2M,

		.type		= MT_DEVICE

	}

};





static void __init ceiva_map_io(void)

{

        clps711x_map_io();

        iotable_init(ceiva_io_desc, ARRAY_SIZE(ceiva_io_desc));

}





MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")

	/* Maintainer: Rob Scott */

	.atag_offset	= 0x100,

	.map_io		= ceiva_map_io,

	.init_irq	= clps711x_init_irq,

	.timer		= &clps711x_timer,

	.restart	= clps711x_restart,

MACHINE_END

arch/arm/mach-clps711x/common.c

+73 −16
Original line number Diff line number Diff line
@@ -19,24 +19,25 @@ 
 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

#include <linux/kernel.h>

#include <linux/mm.h>

#include <linux/io.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/irq.h>

#include <linux/sched.h>

#include <linux/clk.h>

#include <linux/clkdev.h>

#include <linux/clk-provider.h>



#include <asm/sizes.h>

#include <mach/hardware.h>

#include <asm/irq.h>

#include <asm/leds.h>

#include <asm/pgtable.h>

#include <asm/page.h>

#include <asm/mach/map.h>

#include <asm/mach/time.h>

#include <asm/system_misc.h>



#include <mach/hardware.h>



static struct clk *clk_pll, *clk_bus, *clk_uart, *clk_timerl, *clk_timerh,

		  *clk_tint, *clk_spi;

static unsigned long latch;



/*

 * This maps the generic CLPS711x registers

 */
@@ -166,8 +167,8 @@ void __init clps711x_init_irq(void) 
static unsigned long clps711x_gettimeoffset(void)

{

	unsigned long hwticks;

	hwticks = LATCH - (clps_readl(TC2D) & 0xffff);	/* since last underflow */

	return (hwticks * (tick_nsec / 1000)) / LATCH;

	hwticks = latch - (clps_readl(TC2D) & 0xffff);

	return (hwticks * (tick_nsec / 1000)) / latch;

}



/*
@@ -185,15 +186,71 @@ static struct irqaction clps711x_timer_irq = { 
	.handler	= p720t_timer_interrupt,

};



static void add_fixed_clk(struct clk *clk, const char *name, int rate)

{

	clk = clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);

	clk_register_clkdev(clk, name, NULL);

}



static void __init clps711x_timer_init(void)

{

	unsigned int syscon;

	int osc, ext, pll, cpu, bus, timl, timh, uart, spi;

	u32 tmp;



	osc = 3686400;

	ext = 13000000;



	tmp = clps_readl(PLLR) >> 24;

	if (tmp)

		pll = (osc * tmp) / 2;

	else

		pll = 73728000; /* Default value */



	tmp = clps_readl(SYSFLG2);

	if (tmp & SYSFLG2_CKMODE) {

		cpu = ext;

		bus = cpu;

		spi = 135400;

	} else {

		cpu = pll;

		if (cpu >= 36864000)

			bus = cpu / 2;

		else

			bus = 36864000 / 2;

		spi = cpu / 576;

	}



	uart = bus / 10;



	if (tmp & SYSFLG2_CKMODE) {

		tmp = clps_readl(SYSCON2);

		if (tmp & SYSCON2_OSTB)

			timh = ext / 26;

		else

			timh = 541440;

	} else

		timh = cpu / 144;



	timl = timh / 256;



	/* All clocks are fixed */

	add_fixed_clk(clk_pll, "pll", pll);

	add_fixed_clk(clk_bus, "bus", bus);

	add_fixed_clk(clk_uart, "uart", uart);

	add_fixed_clk(clk_timerl, "timer_lf", timl);

	add_fixed_clk(clk_timerh, "timer_hf", timh);

	add_fixed_clk(clk_tint, "tint", 64);

	add_fixed_clk(clk_spi, "spi", spi);



	pr_info("CPU frequency set at %i Hz.\n", cpu);



	latch = (timh + HZ / 2) / HZ;



	syscon = clps_readl(SYSCON1);

	syscon |= SYSCON1_TC2S | SYSCON1_TC2M;

	clps_writel(syscon, SYSCON1);

	tmp = clps_readl(SYSCON1);

	tmp |= SYSCON1_TC2S | SYSCON1_TC2M;

	clps_writel(tmp, SYSCON1);



	clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */

	clps_writel(latch - 1, TC2D);



	setup_irq(IRQ_TC2OI, &clps711x_timer_irq);

}

CRA Git | Maintained and supported by SUSTech CRA and CCSE