powerpc/pmem: Avoid the barrier in flush routines (436499ab) · Commits · 戴 / test

nvdimm expect the flush routines to just mark the cache clean. The barrier that mark the store globally visible is done in nvdimm_flush(). Signed-off-by:

Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by:

Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200701072235.223558-7-aneesh.kumar@linux.ibm.com

arch/powerpc/lib/pmem.c

+0 −6

Original line number	Diff line number	Diff line
		@@ -19,9 +19,6 @@ static inline void __clean_pmem_range(unsigned long start, unsigned long stop)

		for (i = 0; i < size >> shift; i++, addr += bytes)
		asm volatile(PPC_DCBSTPS(%0, %1): :"i"(0), "r"(addr): "memory");


		asm volatile(PPC_PHWSYNC ::: "memory");
		}

		static inline void __flush_pmem_range(unsigned long start, unsigned long stop)
		@@ -34,9 +31,6 @@ static inline void __flush_pmem_range(unsigned long start, unsigned long stop)

		for (i = 0; i < size >> shift; i++, addr += bytes)
		asm volatile(PPC_DCBFPS(%0, %1): :"i"(0), "r"(addr): "memory");


		asm volatile(PPC_PHWSYNC ::: "memory");
		}

		static inline void clean_pmem_range(unsigned long start, unsigned long stop)

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