Commit 435e2f97 authored by Yong Zhao's avatar Yong Zhao Committed by Alex Deucher
Browse files

drm/amdkfd: page_table_base already have the flags needed



The flags are added when calling amdgpu_gmc_pd_addr().

Signed-off-by: default avatarYong Zhao <Yong.Zhao@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent deb99d7c
Loading
Loading
Loading
Loading
+2 −3
Original line number Original line Diff line number Diff line
@@ -978,7 +978,6 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
		uint64_t page_table_base)
		uint64_t page_table_base)
{
{
	struct amdgpu_device *adev = get_amdgpu_device(kgd);
	struct amdgpu_device *adev = get_amdgpu_device(kgd);
	uint64_t base = page_table_base | AMDGPU_PTE_VALID;


	if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) {
	if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) {
		pr_err("trying to set page table base for wrong VMID %u\n",
		pr_err("trying to set page table base for wrong VMID %u\n",
@@ -990,7 +989,7 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
	 * now, all processes share the same address space size, like
	 * now, all processes share the same address space size, like
	 * on GFX8 and older.
	 * on GFX8 and older.
	 */
	 */
	mmhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
	mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);


	gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
	gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);
}
}
+1 −0
Original line number Original line Diff line number Diff line
@@ -507,6 +507,7 @@ struct qcm_process_device {
	 * All the memory management data should be here too
	 * All the memory management data should be here too
	 */
	 */
	uint64_t gds_context_area;
	uint64_t gds_context_area;
	/* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
	uint64_t page_table_base;
	uint64_t page_table_base;
	uint32_t sh_mem_config;
	uint32_t sh_mem_config;
	uint32_t sh_mem_bases;
	uint32_t sh_mem_bases;