Commit 42d61413 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt 

i.MX device tree changes for 5.1:
 - New board support: Logic PD i.MX6QD EVM, ZII SSMB DTU, Phytec
   phyBOARD i.MX6UL Segin, Y Soft IOTA Draco, Hydra and Ursa boards.
 - Add regulator control for various sensors on imx6qdl-sabresd board.
 - Add DISPLAY power domain support for i.MX6SX SoC.
 - Add stmpe-adc device node for Toradex iMX6 module.
 - Switch to SPDX identifier for imx6q-tbs2910 board.
 - Add proper ksz9031 clock skew values for imx6qdl-phytec-pfla02 board.
 - Mark I2C recovery GPIOs as open drain and correct and WEIM range
   configuration for apalis/colibri boards.
 - Small and random updates to various devices.

* tag 'imx-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

: (31 commits)
  ARM: dts: imx: Add support for Logic PD i.MX6QD EVM
  ARM: dts: imx6qdl-sabresd: remove reg_sensors' regulator-always-on
  ARM: dts: imx6qdl-sabresd: add regulators control for mma8451 sensor
  ARM: dts: imx6qdl-sabresd: add regulators control for mag3110 sensor
  ARM: dts: imx6qdl-sabresd: add regulator control for isl29023 sensor
  ARM: dts: vf610: Add ZII SSMB DTU board
  ARM: dts: pfla02: add ksz9031 clock skew values
  ARM: dts: imx6qdl-phytec-pfla02: add missing interrupt-controller property
  ARM: dts: Add stmpe-adc DT node to Toradex iMX6 modules
  ARM: dts: Add devicetree compatibles for LS1021A based boards
  ARM: dts: colibri: use valid range configuration for weim
  ARM: dts: imx6: Add support for Phytec phyBOARD i.MX6UL Segin
  ARM: dts: imx6*-apalis/-colibri: mark I2C recovery GPIOs as open drain
  ARM: dts: vf610-zii-ssmb-spu3: Pass "no-sdio"/"no-sd" properties
  ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards
  ARM: dts: imx7ulp: add sim node
  ARM: dts: imx6ull: change to use new compatible "fsl,imx6ull-usdhc" for usdhc
  ARM: dts: imx6ull: Fix i.MX6ULL/ULZ ocotp compatible
  ARM: dts: imx6sx: Add DISPLAY power domain support
  ARM: dts: i.MX51: digi-connectcore-som: Add support for I2C bus recovery
  ...

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 89081095 1c207f91

arch/arm/boot/dts/Makefile

+5 −0
Original line number Diff line number Diff line
@@ -448,6 +448,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ 
	imx6dl-wandboard.dtb \

	imx6dl-wandboard-revb1.dtb \

	imx6dl-wandboard-revd1.dtb \

	imx6dl-yapp4-draco.dtb \

	imx6dl-yapp4-hydra.dtb \

	imx6dl-yapp4-ursa.dtb \

	imx6q-apalis-eval.dtb \

	imx6q-apalis-ixora.dtb \

	imx6q-apalis-ixora-v1.1.dtb \
@@ -564,6 +567,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ 
	imx6ul-opos6uldev.dtb \

	imx6ul-pico-hobbit.dtb \

	imx6ul-pico-pi.dtb \

	imx6ul-phytec-phyboard-segin-full.dtb \

	imx6ul-tx6ul-0010.dtb \

	imx6ul-tx6ul-0011.dtb \

	imx6ul-tx6ul-mainboard.dtb \
@@ -602,6 +606,7 @@ dtb-$(CONFIG_SOC_VF610) += \ 
	vf610-zii-dev-rev-b.dtb \

	vf610-zii-dev-rev-c.dtb \

	vf610-zii-scu4-aib.dtb \

	vf610-zii-ssmb-dtu.dtb \

	vf610-zii-ssmb-spu3.dtb

dtb-$(CONFIG_ARCH_MXS) += \

	imx23-evk.dtb \

arch/arm/boot/dts/imx27.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ 
		spi2 = &cspi3;

	};



	aitc: aitc-interrupt-controller@e0000000 {

	aitc: aitc-interrupt-controller@10040000 {

		compatible = "fsl,imx27-aitc", "fsl,avic";

		interrupt-controller;

		#interrupt-cells = <1>;

arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts

+16 −0
Original line number Diff line number Diff line
@@ -21,12 +21,28 @@ 
	};

};



&esdhc1 {

	status = "okay";

};



&owire {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_owire>;

	status = "okay";

};



&pmic {

	fsl,mc13xxx-uses-rtc;



	regulators {

		vcoincell_reg: vcoincell {

			regulator-min-microvolt = <3000000>;

			regulator-max-microvolt = <3000000>;

			regulator-always-on;

		};

	};

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi

+26 −8
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@ 
		reg = <0>;

		interrupt-parent = <&gpio1>;

		interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;

		fsl,mc13xxx-uses-rtc;



		regulators {

			sw1_reg: sw1 {
@@ -142,14 +141,15 @@ 
			pwgt2spi_reg: pwgt2spi {

				regulator-always-on;

			};



			vcoincell_reg: vcoincell {

				regulator-min-microvolt = <3000000>;

				regulator-max-microvolt = <3000000>;

				regulator-always-on;

		};

	};

};



&esdhc1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_esdhc1>;

	max-frequency = <50000000>;

	bus-width = <1>;

};



&esdhc2 {
@@ -174,9 +174,12 @@ 
};



&i2c2 {

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	clock-frequency = <400000>;

	scl-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;

	sda-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;

	status = "okay";



	mma7455l@1d {
@@ -241,6 +244,14 @@ 
			>;

		};



		pinctrl_esdhc1: esdhc1grp {

			fsl,pins = <

				MX51_PAD_SD1_CLK__SD1_CLK		0x400021d5

				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5

				MX51_PAD_SD1_DATA0__SD1_DATA0		0x400020d5

			>;

		};



		pinctrl_esdhc2: esdhc2grp {

			fsl,pins = <

				MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5
@@ -282,6 +293,13 @@ 
			>;

		};



		pinctrl_i2c2_gpio: i2c2gpiogrp {

			fsl,pins = <

				MX51_PAD_GPIO1_2__GPIO1_2		0x400001ed

				MX51_PAD_GPIO1_3__GPIO1_3		0x400001ed

			>;

		};



		pinctrl_nfc: nfcgrp {

			fsl,pins = <

				MX51_PAD_NANDF_D0__NANDF_D0		0x80000000

arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi

0 → 100644
+555 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

//

// Copyright (C) 2019 Logic PD, Inc.



/ {

	keyboard {

		compatible = "gpio-keys";



		btn0 {

			gpios = <&pcf8575 0 GPIO_ACTIVE_LOW>;

			label = "btn0";

			linux,code = <KEY_WAKEUP>;

			debounce-interval = <10>;

			wakeup-source;

		};



		btn1 {

			gpios = <&pcf8575 1 GPIO_ACTIVE_LOW>;

			label = "btn1";

			linux,code = <KEY_WAKEUP>;

			debounce-interval = <10>;

			wakeup-source;

		};



		btn2 {

			gpios = <&pcf8575 2 GPIO_ACTIVE_LOW>;

			label = "btn2";

			linux,code = <KEY_WAKEUP>;

			debounce-interval = <10>;

			wakeup-source;

		};



		btn3 {

			gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>;

			label = "btn3";

			linux,code = <KEY_WAKEUP>;

			debounce-interval = <10>;

			wakeup-source;

		};



	};



	leds {

		compatible = "gpio-leds";



		gen-led0 {

			label = "led0";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_led0>;

			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "cpu0";

		};



		gen-led1 {

			label = "led1";

			gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>;

		};



		gen-led2 {

			label = "led2";

			gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "heartbeat";

		};



		gen-led3 {

			label = "led3";

			gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "default-on";

		};

	};



	reg_usb_otg_vbus: regulator-otg-vbus {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_usb_otg>;

		compatible = "regulator-fixed";

		regulator-name = "usb_otg_vbus";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	reg_usb_h1_vbus: regulator-usb-h1-vbus {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_usb_h1_vbus>;

		compatible = "regulator-fixed";

		regulator-name = "usb_h1_vbus";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	reg_3v3: regulator-3v3 {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_3v3>;

		compatible = "regulator-fixed";

		regulator-name = "reg_3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		regulator-always-on;

	};



	reg_enet: regulator-ethernet {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_enet>;

		compatible = "regulator-fixed";

		regulator-name = "ethernet-supply";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;

		startup-delay-us = <70000>;

		enable-active-high;

		vin-supply = <&sw4_reg>;

	};



	reg_audio: regulator-audio {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_audio>;

		compatible = "regulator-fixed";

		regulator-name = "3v3_aud";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		vin-supply = <&reg_3v3>;

	};



	reg_hdmi: regulator-hdmi {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_hdmi>;

		compatible = "regulator-fixed";

		regulator-name = "hdmi-supply";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		vin-supply = <&reg_3v3>;

	};



	reg_uart3: regulator-uart3 {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_uart3>;

		compatible = "regulator-fixed";

		regulator-name = "uart3-supply";

		gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		regulator-always-on;

		vin-supply = <&reg_3v3>;

	};



	reg_1v8: regulator-1v8 {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_1v8>;

		compatible = "regulator-fixed";

		regulator-name = "1v8-supply";

		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		regulator-always-on;

		vin-supply = <&reg_3v3>;

	};



	reg_pcie: regulator-pcie {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_pcie>;

		regulator-name = "mpcie_3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	reg_mipi: regulator-mipi {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_mipi>;

		regulator-name = "mipi_pwr_en";

		regulator-min-microvolt = <2800000>;

		regulator-max-microvolt = <2800000>;

		gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	sound {

		compatible = "fsl,imx-audio-wm8962";

		model = "wm8962-audio";

		ssi-controller = <&ssi2>;

		audio-codec = <&wm8962>;

		audio-routing =

			"Headphone Jack", "HPOUTL",

			"Headphone Jack", "HPOUTR",

			"Ext Spk", "SPKOUTL",

			"Ext Spk", "SPKOUTR",

			"AMIC", "MICBIAS",

			"IN3R", "AMIC";

		mux-int-port = <2>;

		mux-ext-port = <4>;

	};

};



&audmux {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_audmux>;

	status = "okay";

};



&ecspi1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi1>;

	status = "disabled";

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rgmii";

	phy-reset-duration = <10>;

	phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;

	phy-supply = <&reg_enet>;

	interrupt-parent = <&gpio1>;

	interrupts = <25 IRQ_TYPE_EDGE_FALLING>;

	status = "okay";

};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c1>;

	clock-frequency = <400000>;

	status = "okay";



	wm8962: audio-codec@1a {

		compatible = "wlf,wm8962";

		reg = <0x1a>;

		clocks = <&clks IMX6QDL_CLK_CKO>;

		clock-names = "xclk";

		DCVDD-supply = <&reg_audio>;

		DBVDD-supply = <&reg_audio>;

		AVDD-supply = <&reg_audio>;

		CPVDD-supply = <&reg_audio>;

		MICVDD-supply = <&reg_audio>;

		PLLVDD-supply = <&reg_audio>;

		SPKVDD1-supply = <&reg_audio>;

		SPKVDD2-supply = <&reg_audio>;

		gpio-cfg = <

			0x0000 /* 0:Default */

			0x0000 /* 1:Default */

			0x0013 /* 2:FN_DMICCLK */

			0x0000 /* 3:Default */

			0x8014 /* 4:FN_DMICCDAT */

			0x0000 /* 5:Default */

		>;

	};

};



&i2c3 {

	ov5640: camera@10 {

		compatible = "ovti,ov5640";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_ov5640>;

		reg = <0x10>;

		clocks = <&clks IMX6QDL_CLK_CKO>;

		clock-names = "xclk";

		DOVDD-supply = <&reg_mipi>;

		AVDD-supply = <&reg_mipi>;

		DVDD-supply = <&reg_mipi>;

		reset-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;

		powerdown-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;



		port {

			ov5640_to_mipi_csi2: endpoint {

				remote-endpoint = <&mipi_csi2_in>;

				clock-lanes = <0>;

				data-lanes = <1 2>;

			};

		};

	};



	pcf8575: gpio@20 {

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_pcf8574>;

		compatible = "nxp,pcf8575";

		reg = <0x20>;

		interrupt-parent = <&gpio6>;

		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

		lines-initial-states = <0x0710>;

		wakeup-source;

	};

};



&ipu1_csi1_from_mipi_vc1 {

	clock-lanes = <0>;

	data-lanes = <1 2>;

};



&mipi_csi {

	status = "okay";



	port@0 {

		reg = <0>;



		mipi_csi2_in: endpoint {

			remote-endpoint = <&ov5640_to_mipi_csi2>;

			clock-lanes = <0>;

			data-lanes = <1 2>;

		};

	};

};



&pcie {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pcie>;

	reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;

	vpcie-supply = <&reg_pcie>;

	status = "okay";

};



&pwm3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm3>;

};



&ssi2 {

	status = "okay";

};



&uart3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart3>;

	status = "okay";

};



&usbh1 {

	vbus-supply = <&reg_usb_h1_vbus>;

	status = "okay";

};



&usbotg {

	vbus-supply = <&reg_usb_otg_vbus>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usbotg>;

	disable-over-current;

	dr_mode = "otg";

	status = "okay";

};



&usdhc2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc2>;

	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;

	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;

	vmmc-supply = <&reg_3v3>;

	no-1-8-v;

	keep-power-in-suspend;

	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;

	status = "okay";

};



&iomuxc {

	pinctrl_audmux: audmuxgrp {

		fsl,pins = <

			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0

			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0

			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0

			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0

		>;

	};



	pinctrl_ecspi1: ecspi1grp {

		fsl,pins = <

			MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK	0x100b1

			MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI	0x100b1

			MX6QDL_PAD_KEY_COL1__ECSPI1_MISO	0x100b1

			MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0		0x100b1

		>;

	};



	pinctrl_enet: enetgrp {

		fsl,pins = <

			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0

			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0

			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030

			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030

			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030

			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030

			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030

			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0

			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030

			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8

			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030

			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030

			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030

			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030

			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030

			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030

			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0	/* ENET_INT */

			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x1b0b0	/* ETHR_nRST */

		>;

	};



	pinctrl_i2c1: i2c1grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1

			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1

		>;

	};



	pinctrl_led0: led0grp {

	    fsl,pins = <

		MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0

	    >;

	};



	pinctrl_ov5640: ov5640grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D26__GPIO3_IO26	0x1b0b1

			MX6QDL_PAD_EIM_D27__GPIO3_IO27	0x1b0b1

		>;

	};



	pinctrl_pcf8574: pcf8575grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0

		>;

	};



	pinctrl_pcie: pciegrp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0

			MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0

		>;

	};



	pinctrl_pwm3: pwm3grp {

	    fsl,pins = <

		MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1

	    >;

	};



	pinctrl_reg_1v8: reg1v8grp {

	    fsl,pins = <

		MX6QDL_PAD_EIM_D30__GPIO3_IO30		0x1b0b0

	    >;

	};



	pinctrl_reg_3v3: reg3v3grp {

	    fsl,pins = <

		MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b0

	    >;

	};



	pinctrl_reg_audio: reg-audiogrp {

		fsl,pins = <

			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0

		>;

	};



	pinctrl_reg_enet: reg-enetgrp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D31__GPIO3_IO31	0x1b0b0

		>;

	};



	pinctrl_reg_hdmi: reg-hdmigrp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D20__GPIO3_IO20	0x1b0b0

		>;

	};



	pinctrl_reg_mipi: reg-mipigrp {

		fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;

	};



	pinctrl_reg_pcie: reg-pciegrp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_2__GPIO1_IO02	0x1b0b0

			>;

	};



	pinctrl_reg_uart3: reguart3grp {

	    fsl,pins = <

		MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0

	    >;

	};



	pinctrl_reg_usb_h1_vbus: usbh1grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0

		>;

	};



	pinctrl_reg_usb_otg: reg-usb-otggrp {

		fsl,pins = <

			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0

		>;

	};



	pinctrl_uart3: uart3grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1

			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1

			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1

			MX6QDL_PAD_EIM_EB3__UART3_RTS_B		0x1b0b1

		>;

	};



	pinctrl_usbotg: usbotggrp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_1__USB_OTG_ID	0xd17059

		>;

	};



	pinctrl_usdhc2: usdhc2grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */

			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17069

			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10069

			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17069

			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17069

			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17069

			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17069

		>;

	};



	pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {

		fsl,pins = <

			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */

			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9

			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9

			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9

			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9

			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9

			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9

		>;

	};



	pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {

		fsl,pins = <

			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0	/* CD */

			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9

			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9

			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9

			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9

			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9

			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9

		>;

	};



};

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