Commit 42c2798b authored by Jesse Barnes's avatar Jesse Barnes Committed by Eric Anholt
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drm/i915: apply G45 vblank count code to all G4x chips and fix max_frame_count 



All G4x and newer chips use the new style frame count register, with a
full 32 bit frame count.  Update the code to reflect this.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent 70aa96ca

drivers/gpu/drm/i915/i915_dma.c

+4 −1
Original line number Diff line number Diff line
@@ -1161,8 +1161,11 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
#endif



	dev->driver->get_vblank_counter = i915_get_vblank_counter;

	if (IS_GM45(dev))

	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */

	if (IS_G4X(dev)) {

		dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */

		dev->driver->get_vblank_counter = gm45_get_vblank_counter;

	}



	i915_gem_load(dev);

drivers/gpu/drm/i915/i915_irq.c

+0 −2
Original line number Diff line number Diff line
@@ -574,8 +574,6 @@ int i915_driver_irq_postinstall(struct drm_device *dev) 


	dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;



	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */



	/* Unmask the interrupts that we always want on. */

	dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX;

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