Commit 4287ec9a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'amlogic-dt64-2' of...

Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.7 (round 2)
- G12[ab]: add SPI support, enable on odroid-n2

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson-g12b-odroid-n2: add SPIFC controller node
  arm64: dts: khadas-vim3: add SPIFC controller node
  arm64: dts: meson-g12: add the SPIFC nodes
  arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width
  arm64: dts: meson-g12-common: add spicc controller nodes
  dt-bindings: clk: g12a-clkc: add SPICC SCLK Source clock IDs
  dt-bindings: clk: meson: add the gxl internal dac gate

Link: https://lore.kernel.org/r/7hftdyhfq4.fsf@baylibre.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 47a4e437 a084eaf3
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+125 −10
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@@ -295,17 +295,9 @@
						};
					};

					emmc_pins: emmc {
					emmc_ctrl_pins: emmc-ctrl {
						mux-0 {
							groups = "emmc_nand_d0",
								 "emmc_nand_d1",
								 "emmc_nand_d2",
								 "emmc_nand_d3",
								 "emmc_nand_d4",
								 "emmc_nand_d5",
								 "emmc_nand_d6",
								 "emmc_nand_d7",
								 "emmc_cmd";
							groups = "emmc_cmd";
							function = "emmc";
							bias-pull-up;
							drive-strength-microamp = <4000>;
@@ -319,6 +311,34 @@
						};
					};

					emmc_data_4b_pins: emmc-data-4b {
						mux-0 {
							groups = "emmc_nand_d0",
								 "emmc_nand_d1",
								 "emmc_nand_d2",
								 "emmc_nand_d3";
							function = "emmc";
							bias-pull-up;
							drive-strength-microamp = <4000>;
						};
					};

					emmc_data_8b_pins: emmc-data-8b {
						mux-0 {
							groups = "emmc_nand_d0",
								 "emmc_nand_d1",
								 "emmc_nand_d2",
								 "emmc_nand_d3",
								 "emmc_nand_d4",
								 "emmc_nand_d5",
								 "emmc_nand_d6",
								 "emmc_nand_d7";
							function = "emmc";
							bias-pull-up;
							drive-strength-microamp = <4000>;
						};
					};

					emmc_ds_pins: emmc-ds {
						mux {
							groups = "emmc_nand_ds";
@@ -573,6 +593,17 @@
						};
					};

					nor_pins: nor {
						mux {
							groups = "nor_d",
							       "nor_q",
							       "nor_c",
							       "nor_cs";
							function = "nor";
							bias-disable;
						};
					};

					pdm_din0_a_pins: pdm-din0-a {
						mux {
							groups = "pdm_din0_a";
@@ -957,6 +988,57 @@
						};
					};

					spicc0_x_pins: spicc0-x {
						mux {
							groups = "spi0_mosi_x",
							       "spi0_miso_x",
							       "spi0_clk_x";
							function = "spi0";
							drive-strength-microamp = <4000>;
							bias-disable;
						};
					};

					spicc0_ss0_x_pins: spicc0-ss0-x {
						mux {
							groups = "spi0_ss0_x";
							function = "spi0";
							drive-strength-microamp = <4000>;
							bias-disable;
						};
					};

					spicc0_c_pins: spicc0-c {
						mux {
							groups = "spi0_mosi_c",
							       "spi0_miso_c",
							       "spi0_ss0_c",
							       "spi0_clk_c";
							function = "spi0";
							drive-strength-microamp = <4000>;
							bias-disable;
						};
					};

					spicc1_pins: spicc1 {
						mux {
							groups = "spi1_mosi",
							       "spi1_miso",
							       "spi1_clk";
							function = "spi1";
							drive-strength-microamp = <4000>;
						};
					};

					spicc1_ss0_pins: spicc1-ss0 {
						mux {
							groups = "spi1_ss0";
							function = "spi1";
							drive-strength-microamp = <4000>;
							bias-disable;
						};
					};

					tdm_a_din0_pins: tdm-a-din0 {
						mux {
							groups = "tdm_a_din0";
@@ -2051,6 +2133,39 @@
				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
			};

			spicc0: spi@13000 {
				compatible = "amlogic,meson-g12a-spicc";
				reg = <0x0 0x13000 0x0 0x44>;
				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clkc CLKID_SPICC0>,
					 <&clkc CLKID_SPICC0_SCLK>;
				clock-names = "core", "pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spicc1: spi@15000 {
				compatible = "amlogic,meson-g12a-spicc";
				reg = <0x0 0x15000 0x0 0x44>;
				interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clkc CLKID_SPICC1>,
					 <&clkc CLKID_SPICC1_SCLK>;
				clock-names = "core", "pclk";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spifc: spi@14000 {
				compatible = "amlogic,meson-gxbb-spifc";
				status = "disabled";
				reg = <0x0 0x14000 0x0 0x80>;
				#address-cells = <1>;
				#size-cells = <0>;
				clocks = <&clkc CLKID_CLK81>;
			};

			pwm_ef: pwm@19000 {
				compatible = "amlogic,meson-g12a-ee-pwm";
				reg = <0x0 0x19000 0x0 0x20>;
+1 −0
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2019 BayLibre, SAS
+1 −1
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@@ -472,7 +472,7 @@
/* eMMC */
&sd_emmc_c {
	status = "okay";
	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
	pinctrl-1 = <&emmc_clk_gate_pins>;
	pinctrl-names = "default", "clk-gate";

+1 −1
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@@ -271,7 +271,7 @@
/* eMMC */
&sd_emmc_c {
	status = "okay";
	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
	pinctrl-1 = <&emmc_clk_gate_pins>;
	pinctrl-names = "default", "clk-gate";

+1 −1
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@@ -443,7 +443,7 @@
/* eMMC */
&sd_emmc_c {
	status = "okay";
	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
	pinctrl-1 = <&emmc_clk_gate_pins>;
	pinctrl-names = "default", "clk-gate";

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