Commit 420127e5 authored by Sascha Hauer's avatar Sascha Hauer Committed by Shawn Guo
Browse files

ARM: dts: imx6: Add DFI FS700-M60 board support 



The DFI FS700-M60 is a q7 board with i.MX6 quad, dual, duallite or solo
SoC. This adds support for it.

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 98ea6ad2

arch/arm/boot/dts/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx53-qsb.dtb \

	imx53-smd.dtb \

	imx6dl-cubox-i.dtb \

	imx6dl-dfi-fs700-m60.dtb \

	imx6dl-gw51xx.dtb \

	imx6dl-gw52xx.dtb \

	imx6dl-gw53xx.dtb \
@@ -166,6 +167,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx6q-arm2.dtb \

	imx6q-cm-fx6.dtb \

	imx6q-cubox-i.dtb \

	imx6q-dfi-fs700-m60.dtb \

	imx6q-dmo-edmqmx6.dtb \

	imx6q-gw51xx.dtb \

	imx6q-gw52xx.dtb \

arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts

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/*

 * Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



#ifndef __DTS_V1__

#define __DTS_V1__

/dts-v1/;

#endif



#include "imx6dl.dtsi"

#include "imx6qdl-dfi-fs700-m60.dtsi"



/ {

	model = "DFI FS700-M60-6DL i.MX6dl Q7 Board";

	compatible = "dfi,fs700-m60-6dl", "dfi,fs700e-m60", "fsl,imx6dl";

};

arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts

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/*

 * Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



#ifndef __DTS_V1__

#define __DTS_V1__

/dts-v1/;

#endif



#include "imx6q.dtsi"

#include "imx6qdl-dfi-fs700-m60.dtsi"



/ {

	model = "DFI FS700-M60-6QD i.MX6qd Q7 Board";

	compatible = "dfi,fs700-m60-6qd", "dfi,fs700e-m60", "fsl,imx6q";

};

arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi

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/ {

	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		dummy_reg: regulator@0 {

			compatible = "regulator-fixed";

			reg = <0>;

			regulator-name = "dummy-supply";

		};



		reg_usb_otg_vbus: regulator@1 {

			compatible = "regulator-fixed";

			reg = <1>;

			regulator-name = "usb_otg_vbus";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			gpio = <&gpio3 22 0>;

			enable-active-high;

		};

	};



	chosen {

		linux,stdout-path = &uart1;

	};

};



&ecspi3 {

	fsl,spi-num-chipselects = <1>;

	cs-gpios = <&gpio4 24 0>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi3>;

	status = "okay";



	flash: m25p80@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "sst,sst25vf040b", "m25p80";

		spi-max-frequency = <20000000>;

		reg = <0>;

	};

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	status = "okay";

	phy-mode = "rgmii";

};



&iomuxc {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_hog>;



	imx6qdl-dfi-fs700-m60 {

		pinctrl_hog: hoggrp {

			fsl,pins = <

				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000

				MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */

				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */

				MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */

			>;

		};



		pinctrl_enet: enetgrp {

			fsl,pins = <

				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0

				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0

				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0

				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0

				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0

				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0

				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0

				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0

				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0

				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0

				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0

				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0

				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0

				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0

				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0

				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8

			>;

		};



		pinctrl_i2c2: i2c2grp {

			fsl,pins = <

				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1

				MX6QDL_PAD_EIM_D16__I2C2_SDA		0x4001b8b1

			>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1

				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1

			>;

		};



		pinctrl_usbotg: usbotggrp {

			fsl,pins = <

				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059

			>;

		};



		pinctrl_usdhc2: usdhc2grp {

			fsl,pins = <

				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059

				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059

				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059

				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059

				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059

				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059

				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */

			>;

		};



		pinctrl_usdhc3: usdhc3grp {

			fsl,pins = <

				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059

				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059

				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059

				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059

				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059

				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059

			>;

		};



		pinctrl_usdhc4: usdhc4grp {

			fsl,pins = <

				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059

				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059

				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059

				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059

				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059

				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059

				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059

				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059

				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059

				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059

			>;

		};



		pinctrl_ecspi3: ecspi3grp {

			fsl,pins = <

				MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1

				MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1

				MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1

				MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */

			>;

		};

	};

};



&i2c2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c2>;

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	status = "okay";

};



&usbh1 {

	status = "okay";

};



&usbotg {

	vbus-supply = <&reg_usb_otg_vbus>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usbotg>;

	disable-over-current;

	dr_mode = "host";

	status = "okay";

};



&usdhc2 { /* module slot */

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc2>;

	cd-gpios = <&gpio2 2 0>;

	status = "okay";

};



&usdhc3 { /* baseboard slot */

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc3>;

};



&usdhc4 { /* eMMC */

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc4>;

	bus-width = <8>;

	non-removable;

	status = "okay";

};

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