Commit 41e359e6 authored by Nishka Dasgupta's avatar Nishka Dasgupta Committed by Greg Kroah-Hartman
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staging: most: dim2: Remove function dimcb_io_read()



Remove function dimcb_io_read as it does nothing except call inbuilt
function readl.
Modify call sites accordingly.
Issue found with Coccinelle.

Signed-off-by: default avatarNishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190708064145.3250-2-nishkadg.linux@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8826a198
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+0 −9
Original line number Diff line number Diff line
@@ -128,15 +128,6 @@ bool dim2_sysfs_get_state_cb(void)
	return state;
}

/**
 * dimcb_io_read - callback from HAL to read an I/O register
 * @ptr32: register address
 */
u32 dimcb_io_read(u32 __iomem *ptr32)
{
	return readl(ptr32);
}

/**
 * dimcb_io_write - callback from HAL to write value to an I/O register
 * @ptr32: register address
+8 −7
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@
#include "reg.h"
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/io.h>

/*
 * Size factor for isochronous DBR buffer.
@@ -146,7 +147,7 @@ static void dim2_transfer_madr(u32 val)
	dimcb_io_write(&g.dim2->MADR, val);

	/* wait for transfer completion */
	while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1)
	while ((readl(&g.dim2->MCTL) & 1) != 1)
		continue;

	dimcb_io_write(&g.dim2->MCTL, 0);   /* clear transfer complete */
@@ -170,7 +171,7 @@ static u32 dim2_read_ctr(u32 ctr_addr, u16 mdat_idx)
{
	dim2_transfer_madr(ctr_addr);

	return dimcb_io_read((&g.dim2->MDAT0) + mdat_idx);
	return readl((&g.dim2->MDAT0) + mdat_idx);
}

static void dim2_write_ctr_mask(u32 ctr_addr, const u32 *mask, const u32 *value)
@@ -357,14 +358,14 @@ static void dim2_configure_channel(

	/* unmask interrupt for used channel, enable mlb_sys_int[0] interrupt */
	dimcb_io_write(&g.dim2->ACMR0,
		       dimcb_io_read(&g.dim2->ACMR0) | bit_mask(ch_addr));
		       readl(&g.dim2->ACMR0) | bit_mask(ch_addr));
}

static void dim2_clear_channel(u8 ch_addr)
{
	/* mask interrupt for used channel, disable mlb_sys_int[0] interrupt */
	dimcb_io_write(&g.dim2->ACMR0,
		       dimcb_io_read(&g.dim2->ACMR0) & ~bit_mask(ch_addr));
		       readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr));

	dim2_clear_cat(AHB_CAT, ch_addr);
	dim2_clear_adt(ch_addr);
@@ -562,12 +563,12 @@ static bool dim2_is_mlb_locked(void)
	u32 const mask0 = bit_mask(MLBC0_MLBLK_BIT);
	u32 const mask1 = bit_mask(MLBC1_CLKMERR_BIT) |
			  bit_mask(MLBC1_LOCKERR_BIT);
	u32 const c1 = dimcb_io_read(&g.dim2->MLBC1);
	u32 const c1 = readl(&g.dim2->MLBC1);
	u32 const nda_mask = (u32)MLBC1_NDA_MASK << MLBC1_NDA_SHIFT;

	dimcb_io_write(&g.dim2->MLBC1, c1 & nda_mask);
	return (dimcb_io_read(&g.dim2->MLBC1) & mask1) == 0 &&
	       (dimcb_io_read(&g.dim2->MLBC0) & mask0) != 0;
	return (readl(&g.dim2->MLBC1) & mask1) == 0 &&
	       (readl(&g.dim2->MLBC0) & mask0) != 0;
}

/* -------------------------------------------------------------------------- */
+0 −2
Original line number Diff line number Diff line
@@ -97,8 +97,6 @@ bool dim_enqueue_buffer(struct dim_channel *ch, u32 buffer_addr,

bool dim_detach_buffers(struct dim_channel *ch, u16 buffers_number);

u32 dimcb_io_read(u32 __iomem *ptr32);

void dimcb_io_write(u32 __iomem *ptr32, u32 value);

void dimcb_on_error(u8 error_id, const char *error_message);