Staging: qlge: Rewrite two while loops as simple for loops (41e1bf81) · Commits · 戴 / test

This is a task from the TODO list of qlge driver: - some "while" loops could be rewritten with simple "for" The change is in functions ql_wait_reg_rdy and ql_wait_cfg in qlge_main.c. The while loops are basically count based (they decrement on each iteration), and it makes more sense to be a for loop construction instead. Signed-off-by:

Samuil Ivanov <samuil.ivanovbg@gmail.com> Link: https://lore.kernel.org/r/20191023205855.GA1841@samuil-ThinkCentre-M92P Signed-off-by:

Greg Kroah-Hartman <gregkh@linuxfoundation.org>

drivers/staging/qlge/qlge_main.c

+4 −6

Original line number	Diff line number	Diff line
		@@ -167,9 +167,9 @@ void ql_sem_unlock(struct ql_adapter *qdev, u32 sem_mask)
		int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit)
		{
		u32 temp;
		int count = UDELAY_COUNT;
		int count;

		while (count) {
		for (count = 0; count < UDELAY_COUNT; count++) {
		temp = ql_read32(qdev, reg);

		/* check for errors */
		@@ -181,7 +181,6 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit)
		} else if (temp & bit)
		return 0;
		udelay(UDELAY_DELAY);
		count--;
		}
		netif_alert(qdev, probe, qdev->ndev,
		"Timed out waiting for reg %x to come ready.\n", reg);
		@@ -193,17 +192,16 @@ int ql_wait_reg_rdy(struct ql_adapter *qdev, u32 reg, u32 bit, u32 err_bit)
		*/
		static int ql_wait_cfg(struct ql_adapter *qdev, u32 bit)
		{
		int count = UDELAY_COUNT;
		int count;
		u32 temp;

		while (count) {
		for (count = 0; count < UDELAY_COUNT; count++) {
		temp = ql_read32(qdev, CFG);
		if (temp & CFG_LE)
		return -EIO;
		if (!(temp & bit))
		return 0;
		udelay(UDELAY_DELAY);
		count--;
		}
		return -ETIMEDOUT;
		}

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