Commit 41a9aca6 authored by Srikanth Jampala's avatar Srikanth Jampala Committed by Herbert Xu
Browse files

crypto: cavium/nitrox - Added support for SR-IOV configuration. 



Added support to configure SR-IOV using sysfs interface.
Supported VF modes are 16, 32, 64 and 128. Grouped the
hardware configuration functions to "nitrox_hal.h" file.
Changed driver version to "1.1".

Signed-off-by: default avatarSrikanth Jampala <Jampala.Srikanth@cavium.com>
Reviewed-by: default avatarGadam Sreerama <sgadam@cavium.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent a7888481

drivers/crypto/cavium/nitrox/Makefile

+2 −0
Original line number Original line Diff line number Diff line
@@ -7,3 +7,5 @@ n5pf-objs := nitrox_main.o \ 
	nitrox_hal.o \

	nitrox_hal.o \

	nitrox_reqmgr.o \

	nitrox_reqmgr.o \

	nitrox_algs.o

	nitrox_algs.o



n5pf-$(CONFIG_PCI_IOV) += nitrox_sriov.o

drivers/crypto/cavium/nitrox/nitrox_common.h

+0 −14
Original line number Original line Diff line number Diff line
@@ -25,19 +25,5 @@ int nitrox_process_se_request(struct nitrox_device *ndev, 
			      struct skcipher_request *skreq);

			      struct skcipher_request *skreq);

void backlog_qflush_work(struct work_struct *work);

void backlog_qflush_work(struct work_struct *work);





void nitrox_config_emu_unit(struct nitrox_device *ndev);

void nitrox_config_pkt_input_rings(struct nitrox_device *ndev);

void nitrox_config_pkt_solicit_ports(struct nitrox_device *ndev);

void nitrox_config_vfmode(struct nitrox_device *ndev, int mode);

void nitrox_config_nps_unit(struct nitrox_device *ndev);

void nitrox_config_pom_unit(struct nitrox_device *ndev);

void nitrox_config_rand_unit(struct nitrox_device *ndev);

void nitrox_config_efl_unit(struct nitrox_device *ndev);

void nitrox_config_bmi_unit(struct nitrox_device *ndev);

void nitrox_config_bmo_unit(struct nitrox_device *ndev);

void nitrox_config_lbc_unit(struct nitrox_device *ndev);

void invalidate_lbc(struct nitrox_device *ndev);

void enable_pkt_input_ring(struct nitrox_device *ndev, int ring);

void enable_pkt_solicit_port(struct nitrox_device *ndev, int port);





#endif /* __NITROX_COMMON_H */
 
#endif /* __NITROX_COMMON_H */

drivers/crypto/cavium/nitrox/nitrox_dev.h

+28 −8
Original line number Original line Diff line number Diff line
@@ -88,9 +88,25 @@ struct nitrox_bh { 
	struct bh_data *slc;

	struct bh_data *slc;

};

};





/* NITROX-V driver state */

/*

#define NITROX_UCODE_LOADED	0

 * NITROX Device states

#define NITROX_READY		1

 */

enum ndev_state {

	__NDEV_NOT_READY,

	__NDEV_READY,

	__NDEV_IN_RESET,

};



/* NITROX support modes for VF(s) */

enum vf_mode {

	__NDEV_MODE_PF,

	__NDEV_MODE_VF16,

	__NDEV_MODE_VF32,

	__NDEV_MODE_VF64,

	__NDEV_MODE_VF128,

};



#define __NDEV_SRIOV_BIT 0





/* command queue size */

/* command queue size */

#define DEFAULT_CMD_QLEN 2048

#define DEFAULT_CMD_QLEN 2048
@@ -98,7 +114,6 @@ struct nitrox_bh { 
#define CMD_TIMEOUT 2000

#define CMD_TIMEOUT 2000





#define DEV(ndev) ((struct device *)(&(ndev)->pdev->dev))

#define DEV(ndev) ((struct device *)(&(ndev)->pdev->dev))

#define PF_MODE 0





#define NITROX_CSR_ADDR(ndev, offset) \

#define NITROX_CSR_ADDR(ndev, offset) \

	((ndev)->bar_addr + (offset))

	((ndev)->bar_addr + (offset))
@@ -108,13 +123,15 @@ struct nitrox_bh { 
 * @list: pointer to linked list of devices

 * @list: pointer to linked list of devices

 * @bar_addr: iomap address

 * @bar_addr: iomap address

 * @pdev: PCI device information

 * @pdev: PCI device information

 * @status: NITROX status

 * @state: NITROX device state

 * @flags: flags to indicate device the features

 * @timeout: Request timeout in jiffies

 * @timeout: Request timeout in jiffies

 * @refcnt: Device usage count

 * @refcnt: Device usage count

 * @idx: device index (0..N)

 * @idx: device index (0..N)

 * @node: NUMA node id attached

 * @node: NUMA node id attached

 * @qlen: Command queue length

 * @qlen: Command queue length

 * @nr_queues: Number of command queues

 * @nr_queues: Number of command queues

 * @mode: Device mode PF/VF

 * @ctx_pool: DMA pool for crypto context

 * @ctx_pool: DMA pool for crypto context

 * @pkt_cmdqs: SE Command queues

 * @pkt_cmdqs: SE Command queues

 * @msix: MSI-X information

 * @msix: MSI-X information
@@ -128,7 +145,8 @@ struct nitrox_device { 
	u8 __iomem *bar_addr;

	u8 __iomem *bar_addr;

	struct pci_dev *pdev;

	struct pci_dev *pdev;





	unsigned long status;

	atomic_t state;

	unsigned long flags;

	unsigned long timeout;

	unsigned long timeout;

	refcount_t refcnt;

	refcount_t refcnt;
@@ -136,6 +154,8 @@ struct nitrox_device { 
	int node;

	int node;

	u16 qlen;

	u16 qlen;

	u16 nr_queues;

	u16 nr_queues;

	int num_vfs;

	enum vf_mode mode;





	struct dma_pool *ctx_pool;

	struct dma_pool *ctx_pool;

	struct nitrox_cmdq *pkt_cmdqs;

	struct nitrox_cmdq *pkt_cmdqs;
@@ -173,9 +193,9 @@ static inline void nitrox_write_csr(struct nitrox_device *ndev, u64 offset, 
	writeq(value, (ndev->bar_addr + offset));

	writeq(value, (ndev->bar_addr + offset));

}

}





static inline int nitrox_ready(struct nitrox_device *ndev)

static inline bool nitrox_ready(struct nitrox_device *ndev)

{

{

	return test_bit(NITROX_READY, &ndev->status);

	return atomic_read(&ndev->state) == __NDEV_READY;

}

}





#endif /* __NITROX_DEV_H */
 
#endif /* __NITROX_DEV_H */

drivers/crypto/cavium/nitrox/nitrox_hal.c

+11 −1
Original line number Original line Diff line number Diff line
@@ -256,7 +256,7 @@ void nitrox_config_nps_unit(struct nitrox_device *ndev) 
	/* disable ILK interface */

	/* disable ILK interface */

	core_gbl_vfcfg.value = 0;

	core_gbl_vfcfg.value = 0;

	core_gbl_vfcfg.s.ilk_disable = 1;

	core_gbl_vfcfg.s.ilk_disable = 1;

	core_gbl_vfcfg.s.cfg = PF_MODE;

	core_gbl_vfcfg.s.cfg = __NDEV_MODE_PF;

	nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, core_gbl_vfcfg.value);

	nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, core_gbl_vfcfg.value);

	/* config input and solicit ports */

	/* config input and solicit ports */

	nitrox_config_pkt_input_rings(ndev);

	nitrox_config_pkt_input_rings(ndev);
@@ -400,3 +400,13 @@ void nitrox_config_lbc_unit(struct nitrox_device *ndev) 
	offset = LBC_ELM_VF65_128_INT_ENA_W1S;

	offset = LBC_ELM_VF65_128_INT_ENA_W1S;

	nitrox_write_csr(ndev, offset, (~0ULL));

	nitrox_write_csr(ndev, offset, (~0ULL));

}

}



void config_nps_core_vfcfg_mode(struct nitrox_device *ndev, enum vf_mode mode)

{

	union nps_core_gbl_vfcfg vfcfg;



	vfcfg.value = nitrox_read_csr(ndev, NPS_CORE_GBL_VFCFG);

	vfcfg.s.cfg = mode & 0x7;



	nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, vfcfg.value);

}

drivers/crypto/cavium/nitrox/nitrox_hal.h

0 → 100644
+22 −0
Original line number Original line Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __NITROX_HAL_H

#define __NITROX_HAL_H



#include "nitrox_dev.h"



void nitrox_config_emu_unit(struct nitrox_device *ndev);

void nitrox_config_pkt_input_rings(struct nitrox_device *ndev);

void nitrox_config_pkt_solicit_ports(struct nitrox_device *ndev);

void nitrox_config_nps_unit(struct nitrox_device *ndev);

void nitrox_config_pom_unit(struct nitrox_device *ndev);

void nitrox_config_rand_unit(struct nitrox_device *ndev);

void nitrox_config_efl_unit(struct nitrox_device *ndev);

void nitrox_config_bmi_unit(struct nitrox_device *ndev);

void nitrox_config_bmo_unit(struct nitrox_device *ndev);

void nitrox_config_lbc_unit(struct nitrox_device *ndev);

void invalidate_lbc(struct nitrox_device *ndev);

void enable_pkt_input_ring(struct nitrox_device *ndev, int ring);

void enable_pkt_solicit_port(struct nitrox_device *ndev, int port);

void config_nps_core_vfcfg_mode(struct nitrox_device *ndev, enum vf_mode mode);



#endif /* __NITROX_HAL_H */

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