Commit 418bbb6e authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Jonathan Cameron
Browse files

staging:iio:ade7854: Rework SPI write function 



The write operation using SPI has a many code duplications (similar to
I2C) and four different interfaces per data size. This patch introduces
a single function that centralizes the main task related to SPI.

Signed-off-by: default avatarRodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent e4c771d3

drivers/staging/iio/meter/ade7854-spi.c

+41 −67
Original line number Diff line number Diff line
@@ -15,9 +15,10 @@ 
#include <linux/iio/iio.h>

#include "ade7854.h"



static int ade7854_spi_write_reg_8(struct device *dev,

static int ade7854_spi_write_reg(struct device *dev,

				 u16 reg_address,

				   u8 val)

				 u32 val,

				 int bits)

{

	int ret;

	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
@@ -32,93 +33,66 @@ static int ade7854_spi_write_reg_8(struct device *dev, 
	st->tx[0] = ADE7854_WRITE_REG;

	st->tx[1] = (reg_address >> 8) & 0xFF;

	st->tx[2] = reg_address & 0xFF;

	switch (bits) {

	case 8:

		st->tx[3] = val & 0xFF;

		break;

	case 16:

		xfer.len = 5;

		st->tx[3] = (val >> 8) & 0xFF;

		st->tx[4] = val & 0xFF;

		break;

	case 24:

		xfer.len = 6;

		st->tx[3] = (val >> 16) & 0xFF;

		st->tx[4] = (val >> 8) & 0xFF;

		st->tx[5] = val & 0xFF;

		break;

	case 32:

		xfer.len = 7;

		st->tx[3] = (val >> 24) & 0xFF;

		st->tx[4] = (val >> 16) & 0xFF;

		st->tx[5] = (val >> 8) & 0xFF;

		st->tx[6] = val & 0xFF;

		break;

	default:

		ret = -EINVAL;

		goto unlock;

	}



	ret = spi_sync_transfer(st->spi, &xfer, 1);

unlock:

	mutex_unlock(&st->buf_lock);



	return ret;

}



static int ade7854_spi_write_reg_8(struct device *dev,

				   u16 reg_address,

				   u8 val)

{

	return ade7854_spi_write_reg(dev, reg_address, val, 8);

}



static int ade7854_spi_write_reg_16(struct device *dev,

				    u16 reg_address,

				    u16 val)

{

	int ret;

	struct iio_dev *indio_dev = dev_to_iio_dev(dev);

	struct ade7854_state *st = iio_priv(indio_dev);

	struct spi_transfer xfer = {

		.tx_buf = st->tx,

		.bits_per_word = 8,

		.len = 5,

	};



	mutex_lock(&st->buf_lock);

	st->tx[0] = ADE7854_WRITE_REG;

	st->tx[1] = (reg_address >> 8) & 0xFF;

	st->tx[2] = reg_address & 0xFF;

	st->tx[3] = (val >> 8) & 0xFF;

	st->tx[4] = val & 0xFF;



	ret = spi_sync_transfer(st->spi, &xfer, 1);

	mutex_unlock(&st->buf_lock);



	return ret;

	return ade7854_spi_write_reg(dev, reg_address, val, 16);

}



static int ade7854_spi_write_reg_24(struct device *dev,

				    u16 reg_address,

				    u32 val)

{

	int ret;

	struct iio_dev *indio_dev = dev_to_iio_dev(dev);

	struct ade7854_state *st = iio_priv(indio_dev);

	struct spi_transfer xfer = {

		.tx_buf = st->tx,

		.bits_per_word = 8,

		.len = 6,

	};



	mutex_lock(&st->buf_lock);

	st->tx[0] = ADE7854_WRITE_REG;

	st->tx[1] = (reg_address >> 8) & 0xFF;

	st->tx[2] = reg_address & 0xFF;

	st->tx[3] = (val >> 16) & 0xFF;

	st->tx[4] = (val >> 8) & 0xFF;

	st->tx[5] = val & 0xFF;



	ret = spi_sync_transfer(st->spi, &xfer, 1);

	mutex_unlock(&st->buf_lock);



	return ret;

	return ade7854_spi_write_reg(dev, reg_address, val, 24);

}



static int ade7854_spi_write_reg_32(struct device *dev,

				    u16 reg_address,

				    u32 val)

{

	int ret;

	struct iio_dev *indio_dev = dev_to_iio_dev(dev);

	struct ade7854_state *st = iio_priv(indio_dev);

	struct spi_transfer xfer = {

		.tx_buf = st->tx,

		.bits_per_word = 8,

		.len = 7,

	};



	mutex_lock(&st->buf_lock);

	st->tx[0] = ADE7854_WRITE_REG;

	st->tx[1] = (reg_address >> 8) & 0xFF;

	st->tx[2] = reg_address & 0xFF;

	st->tx[3] = (val >> 24) & 0xFF;

	st->tx[4] = (val >> 16) & 0xFF;

	st->tx[5] = (val >> 8) & 0xFF;

	st->tx[6] = val & 0xFF;



	ret = spi_sync_transfer(st->spi, &xfer, 1);

	mutex_unlock(&st->buf_lock);



	return ret;

	return ade7854_spi_write_reg(dev, reg_address, val, 32);

}



static int ade7854_spi_read_reg_8(struct device *dev,

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