Commit 4168c1ca authored by Jorge Ramirez-Ortiz's avatar Jorge Ramirez-Ortiz Committed by Stephen Boyd
Browse files

clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency 



Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.

Co-developed-by: default avatarNiklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: default avatarNiklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: default avatarJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: default avatarStephen Boyd <sboyd@kernel.org>
Link: https://lkml.kernel.org/r/20191125135910.679310-3-niklas.cassel@linaro.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 4316ec05

drivers/clk/qcom/clk-alpha-pll.c

+8 −0
Original line number Diff line number Diff line
@@ -878,6 +878,14 @@ static long clk_trion_pll_round_rate(struct clk_hw *hw, unsigned long rate, 
	return clamp(rate, min_freq, max_freq);

}



const struct clk_ops clk_alpha_pll_fixed_ops = {

	.enable = clk_alpha_pll_enable,

	.disable = clk_alpha_pll_disable,

	.is_enabled = clk_alpha_pll_is_enabled,

	.recalc_rate = clk_alpha_pll_recalc_rate,

};

EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);



const struct clk_ops clk_alpha_pll_ops = {

	.enable = clk_alpha_pll_enable,

	.disable = clk_alpha_pll_disable,

drivers/clk/qcom/clk-alpha-pll.h

+1 −0
Original line number Diff line number Diff line
@@ -109,6 +109,7 @@ struct alpha_pll_config { 
};



extern const struct clk_ops clk_alpha_pll_ops;

extern const struct clk_ops clk_alpha_pll_fixed_ops;

extern const struct clk_ops clk_alpha_pll_hwfsm_ops;

extern const struct clk_ops clk_alpha_pll_postdiv_ops;

extern const struct clk_ops clk_alpha_pll_huayra_ops;

drivers/clk/qcom/gcc-qcs404.c

+1 −1
Original line number Diff line number Diff line
@@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = { 
			.parent_names = (const char *[]){ "cxo" },

			.num_parents = 1,

			.flags = CLK_IS_CRITICAL,

			.ops = &clk_alpha_pll_ops,

			.ops = &clk_alpha_pll_fixed_ops,

		},

	},

};

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