Commit 413cf576 authored by Tomer Tayar's avatar Tomer Tayar Committed by Oded Gabbay
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habanalabs: Make the Coresight timestamp perpetual



The Coresight timestamp is enabled for a specific debug session using
the HL_DEBUG_OP_TIMESTAMP opcode of the debug IOCTL.
In order to have a perpetual timestamp that would be comparable between
various debug sessions, this patch moves the timestamp enablement to be
part of the HW initialization.
The HL_DEBUG_OP_TIMESTAMP opcode turns to be deprecated and shouldn't be
used. Old user-space that will call it won't see any change in the
behavior of the debug session.

Signed-off-by: default avatarTomer Tayar <ttayar@habana.ai>
Reviewed-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
parent 4fd2cb15
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+23 −0
Original line number Diff line number Diff line
@@ -2062,6 +2062,25 @@ static void goya_disable_msix(struct hl_device *hdev)
	goya->hw_cap_initialized &= ~HW_CAP_MSIX;
}

static void goya_enable_timestamp(struct hl_device *hdev)
{
	/* Disable the timestamp counter */
	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);

	/* Zero the lower/upper parts of the 64-bit counter */
	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);
	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);

	/* Enable the counter */
	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);
}

static void goya_disable_timestamp(struct hl_device *hdev)
{
	/* Disable the timestamp counter */
	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);
}

static void goya_halt_engines(struct hl_device *hdev, bool hard_reset)
{
	u32 wait_timeout_ms, cpu_timeout_ms;
@@ -2102,6 +2121,8 @@ static void goya_halt_engines(struct hl_device *hdev, bool hard_reset)
	goya_disable_external_queues(hdev);
	goya_disable_internal_queues(hdev);

	goya_disable_timestamp(hdev);

	if (hard_reset) {
		goya_disable_msix(hdev);
		goya_mmu_remove_device_cpu_mappings(hdev);
@@ -2504,6 +2525,8 @@ static int goya_hw_init(struct hl_device *hdev)

	goya_init_tpc_qmans(hdev);

	goya_enable_timestamp(hdev);

	/* MSI-X must be enabled before CPU queues are initialized */
	rc = goya_enable_msix(hdev);
	if (rc)
+2 −15
Original line number Diff line number Diff line
@@ -636,24 +636,11 @@ static int goya_config_spmu(struct hl_device *hdev,
	return 0;
}

static int goya_config_timestamp(struct hl_device *hdev,
		struct hl_debug_params *params)
{
	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);
	if (params->enable) {
		WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);
		WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);
		WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);
	}

	return 0;
}

int goya_debug_coresight(struct hl_device *hdev, void *data)
{
	struct hl_debug_params *params = data;
	u32 val;
	int rc;
	int rc = 0;

	switch (params->op) {
	case HL_DEBUG_OP_STM:
@@ -675,7 +662,7 @@ int goya_debug_coresight(struct hl_device *hdev, void *data)
		rc = goya_config_spmu(hdev, params);
		break;
	case HL_DEBUG_OP_TIMESTAMP:
		rc = goya_config_timestamp(hdev, params);
		/* Do nothing as this opcode is deprecated */
		break;

	default:
+1 −1
Original line number Diff line number Diff line
@@ -451,7 +451,7 @@ struct hl_debug_params_spmu {
#define HL_DEBUG_OP_BMON	4
/* Opcode for SPMU component */
#define HL_DEBUG_OP_SPMU	5
/* Opcode for timestamp */
/* Opcode for timestamp (deprecated) */
#define HL_DEBUG_OP_TIMESTAMP	6
/* Opcode for setting the device into or out of debug mode. The enable
 * variable should be 1 for enabling debug mode and 0 for disabling it