powerpc/8xx: move CPM1 related files from sysdev/ to platforms/8xx (4128a89a) · Commits · 戴 / test

arch/powerpc/platforms/8xx/Makefile

+2 −0

Original line number	Diff line number	Diff line
		@@ -3,6 +3,8 @@
		# Makefile for the PowerPC 8xx linux kernel.
		#
		obj-y += m8xx_setup.o machine_check.o pic.o
		obj-$(CONFIG_CPM1) += cpm1.o
		obj-$(CONFIG_UCODE_PATCH) += micropatch.o
		obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
		obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o
		obj-$(CONFIG_PPC_EP88XC) += ep88xc.o

arch/powerpc/sysdev/cpm1.c→arch/powerpc/platforms/8xx/cpm1.c

+13 −11

Original line number	Diff line number	Diff line
		@@ -88,7 +88,8 @@ int cpm_get_irq(void)
		{
		int cpm_vec;

		/* Get the vector by setting the ACK bit and then reading
		/*
		* Get the vector by setting the ACK bit and then reading
		* the register.
		*/
		out_be16(&cpic_reg->cpic_civr, 1);
		@@ -108,7 +109,8 @@ static int cpm_pic_host_map(struct irq_domain *h, unsigned int virq,
		return 0;
		}

		/* The CPM can generate the error interrupt when there is a race condition
		/*
		* The CPM can generate the error interrupt when there is a race condition
		* between generating and masking interrupts. All we have to do is ACK it
		* and return. This is a no-op function so we don't need any special
		* tests in the interrupt handler.
		@@ -208,12 +210,10 @@ void __init cpm_reset(void)
		cpmp = &mpc8xx_immr->im_cpm;

		#ifndef CONFIG_PPC_EARLY_DEBUG_CPM
		/* Perform a reset.
		*/
		/* Perform a reset. */
		out_be16(&cpmp->cp_cpcr, CPM_CR_RST \| CPM_CR_FLG);

		/* Wait for it.
		*/
		/* Wait for it. */
		while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG);
		#endif

		@@ -221,7 +221,8 @@ void __init cpm_reset(void)
		cpm_load_patch(cpmp);
		#endif

		/* Set SDMA Bus Request priority 5.
		/*
		* Set SDMA Bus Request priority 5.
		* On 860T, this also enables FEC priority 6. I am not sure
		* this is what we really want for some applications, but the
		* manual recommends it.
		@@ -263,7 +264,8 @@ out:
		}
		EXPORT_SYMBOL(cpm_command);

		/* Set a baud rate generator. This needs lots of work. There are
		/*
		* Set a baud rate generator. This needs lots of work. There are
		* four BRGs, any of which can be wired to any channel.
		* The internal baud rate clock is the system clock divided by 16.
		* This assumes the baudrate is 16x oversampled by the uart.
		@@ -277,11 +279,11 @@ cpm_setbrg(uint brg, uint rate)
		{
		u32 __iomem *bp;

		/* This is good enough to get SMCs running.....
		*/
		/* This is good enough to get SMCs running..... */
		bp = &cpmp->cp_brgc1;
		bp += brg;
		/* The BRG has a 12-bit counter. For really slow baud rates (or
		/*
		* The BRG has a 12-bit counter. For really slow baud rates (or
		* really fast processors), we may have to further divide by 16.
		*/
		if (((BRG_UART_CLK / rate) - 1) < 4096)

arch/powerpc/sysdev/micropatch.c→arch/powerpc/platforms/8xx/micropatch.c

+2 −1

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0

		/* Microcode patches for the CPM as supplied by Motorola.
		/*
		* Microcode patches for the CPM as supplied by Motorola.
		* This is the one for IIC/SPI. There is a newer one that
		* also relocates SMC2, but this would require additional changes
		* to uart.c, so I am holding off on that for a moment.

arch/powerpc/sysdev/Makefile

+0 −2

Original line number	Diff line number	Diff line
		@@ -37,12 +37,10 @@ obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o
		obj-$(CONFIG_OF_RTC) += of_rtc.o

		obj-$(CONFIG_CPM) += cpm_common.o
		obj-$(CONFIG_CPM1) += cpm1.o
		obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o cpm_gpio.o
		obj-$(CONFIG_8xx_GPIO) += cpm_gpio.o
		obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
		obj-$(CONFIG_PPC_DCR) += dcr.o
		obj-$(CONFIG_UCODE_PATCH) += micropatch.o

		obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o
		obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o

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