Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux (410feb75) · Commits · 戴 / test

Pull arm64 updates from Catalin Marinas: "Apart from the core arm64 and perf changes, the Spectre v4 mitigation touches the arm KVM code and the ACPI PPTT support touches drivers/ (acpi and cacheinfo). I should have the maintainers' acks in place. Summary: - Spectre v4 mitigation (Speculative Store Bypass Disable) support for arm64 using SMC firmware call to set a hardware chicken bit - ACPI PPTT (Processor Properties Topology Table) parsing support and enable the feature for arm64 - Report signal frame size to user via auxv (AT_MINSIGSTKSZ). The primary motivation is Scalable Vector Extensions which requires more space on the signal frame than the currently defined MINSIGSTKSZ - ARM perf patches: allow building arm-cci as module, demote dev_warn() to dev_dbg() in arm-ccn event_init(), miscellaneous cleanups - cmpwait() WFE optimisation to avoid some spurious wakeups - L1_CACHE_BYTES reverted back to 64 (for performance reasons that have to do with some network allocations) while keeping ARCH_DMA_MINALIGN to 128. cache_line_size() returns the actual hardware Cache Writeback Granule - Turn LSE atomics on by default in Kconfig - Kernel fault reporting tidying - Some #include and miscellaneous cleanups" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (53 commits) arm64: Fix syscall restarting around signal suppressed by tracer arm64: topology: Avoid checking numa mask for scheduler MC selection ACPI / PPTT: fix build when CONFIG_ACPI_PPTT is not enabled arm64: cpu_errata: include required headers arm64: KVM: Move VCPU_WORKAROUND_2_FLAG macros to the top of the file arm64: signal: Report signal frame size to userspace via auxv arm64/sve: Thin out initialisation sanity-checks for sve_max_vl arm64: KVM: Add ARCH_WORKAROUND_2 discovery through ARCH_FEATURES_FUNC_ID arm64: KVM: Handle guest's ARCH_WORKAROUND_2 requests arm64: KVM: Add ARCH_WORKAROUND_2 support for guests arm64: KVM: Add HYP per-cpu accessors arm64: ssbd: Add prctl interface for per-thread mitigation arm64: ssbd: Introduce thread flag to control userspace mitigation arm64: ssbd: Restore mitigation status on CPU resume arm64: ssbd: Skip apply_ssbd if not using dynamic mitigation arm64: ssbd: Add global mitigation state accessor arm64: Add 'ssbd' command-line option arm64: Add ARCH_WORKAROUND_2 probing arm64: Add per-cpu infrastructure to call ARCH_WORKAROUND_2 arm64: Call ARCH_WORKAROUND_2 on transitions between EL0 and EL1 ...

Documentation/admin-guide/kernel-parameters.txt

+17 −0

Original line number	Diff line number	Diff line
		@@ -4106,6 +4106,23 @@
		expediting. Set to zero to disable automatic
		expediting.

		ssbd= [ARM64,HW]
		Speculative Store Bypass Disable control

		On CPUs that are vulnerable to the Speculative
		Store Bypass vulnerability and offer a
		firmware based mitigation, this parameter
		indicates how the mitigation should be used:

		force-on: Unconditionally enable mitigation for
		for both kernel and userspace
		force-off: Unconditionally disable mitigation for
		for both kernel and userspace
		kernel: Always enable mitigation in the
		kernel, and offer a prctl interface
		to allow userspace to register its
		interest in being mitigated too.

		stack_guard_gap= [MM]
		override the default stack gap protection. The value
		is in page units and it defines how many pages prior

arch/arm/common/mcpm_entry.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -9,6 +9,7 @@
		* published by the Free Software Foundation.
		*/

		#include <linux/export.h>
		#include <linux/kernel.h>
		#include <linux/init.h>
		#include <linux/irqflags.h>
		@@ -174,6 +175,7 @@ bool mcpm_is_available(void)
		{
		return (platform_ops) ? true : false;
		}
		EXPORT_SYMBOL_GPL(mcpm_is_available);

		/*
		* We can't use regular spinlocks. In the switcher case, it is possible

arch/arm/include/asm/kvm_host.h

+12 −0

Original line number	Diff line number	Diff line
		@@ -325,6 +325,18 @@ static inline bool kvm_arm_harden_branch_predictor(void)
		}
		}

		#define KVM_SSBD_UNKNOWN -1
		#define KVM_SSBD_FORCE_DISABLE 0
		#define KVM_SSBD_KERNEL 1
		#define KVM_SSBD_FORCE_ENABLE 2
		#define KVM_SSBD_MITIGATED 3

		static inline int kvm_arm_have_ssbd(void)
		{
		/* No way to detect it yet, pretend it is not there. */
		return KVM_SSBD_UNKNOWN;
		}

		static inline void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu) {}
		static inline void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu) {}

arch/arm/include/asm/kvm_mmu.h

+5 −0

Original line number	Diff line number	Diff line
		@@ -356,6 +356,11 @@ static inline int kvm_map_vectors(void)
		return 0;
		}

		static inline int hyp_map_aux_data(void)
		{
		return 0;
		}

		#define kvm_phys_to_vttbr(addr) (addr)

		#endif /* !__ASSEMBLY__ */

arch/arm/kernel/perf_event_v6.c

+1 −3

Original line number	Diff line number	Diff line
		@@ -303,12 +303,10 @@ static void armv6pmu_enable_event(struct perf_event *event)
		}

		static irqreturn_t
		armv6pmu_handle_irq(int irq_num,
		void *dev)
		armv6pmu_handle_irq(struct arm_pmu *cpu_pmu)
		{
		unsigned long pmcr = armv6_pmcr_read();
		struct perf_sample_data data;
		struct arm_pmu cpu_pmu = (struct arm_pmu )dev;
		struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events);
		struct pt_regs *regs;
		int idx;

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