Commit 410572ec authored by Chunfeng Yun's avatar Chunfeng Yun Committed by Kishon Vijay Abraham I
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phy: phy-mtk-tphy: add a property for internal resistance 



This is used to tune J-K voltage by internal R (resistance), the
range is [0, 31], the resistance value is about 6.9K ohm for 0,
3.8K ohm for 31, and the step is 1K ohm

Signed-off-by: default avatarChunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 8be5a67f

drivers/phy/mediatek/phy-mtk-tphy.c

+14 −2
Original line number Diff line number Diff line
@@ -43,6 +43,8 @@ 
#define PA0_RG_USB20_INTR_EN		BIT(5)



#define U3P_USBPHYACR1		0x004

#define PA1_RG_INTR_CAL		GENMASK(23, 19)

#define PA1_RG_INTR_CAL_VAL(x)	((0x1f & (x)) << 19)

#define PA1_RG_VRT_SEL			GENMASK(14, 12)

#define PA1_RG_VRT_SEL_VAL(x)	((0x7 & (x)) << 12)

#define PA1_RG_TERM_SEL		GENMASK(10, 8)
@@ -302,6 +304,7 @@ struct mtk_phy_instance { 
	int eye_src;

	int eye_vrt;

	int eye_term;

	int intr;

	int discth;

	bool bc12_en;

};
@@ -853,12 +856,14 @@ static void phy_parse_property(struct mtk_tphy *tphy, 
				 &instance->eye_vrt);

	device_property_read_u32(dev, "mediatek,eye-term",

				 &instance->eye_term);

	device_property_read_u32(dev, "mediatek,intr",

				 &instance->intr);

	device_property_read_u32(dev, "mediatek,discth",

				 &instance->discth);

	dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, disc:%d\n",

	dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, intr:%d, disc:%d\n",

		instance->bc12_en, instance->eye_src,

		instance->eye_vrt, instance->eye_term,

		instance->discth);

		instance->intr, instance->discth);

}



static void u2_phy_props_set(struct mtk_tphy *tphy,
@@ -895,6 +900,13 @@ static void u2_phy_props_set(struct mtk_tphy *tphy, 
		writel(tmp, com + U3P_USBPHYACR1);

	}



	if (instance->intr) {

		tmp = readl(com + U3P_USBPHYACR1);

		tmp &= ~PA1_RG_INTR_CAL;

		tmp |= PA1_RG_INTR_CAL_VAL(instance->intr);

		writel(tmp, com + U3P_USBPHYACR1);

	}



	if (instance->discth) {

		tmp = readl(com + U3P_USBPHYACR6);

		tmp &= ~PA6_RG_U2_DISCTH;

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