Commit 408d2deb authored by Vivien Didelot's avatar Vivien Didelot Committed by David S. Miller
Browse files

net: dsa: mv88e6xxx: use helper for 6390 histogram



The Marvell 88E6390 model has its histogram mode bits moved in the
Global 1 Control 2 register. Use the previously introduced
mv88e6xxx_g1_ctl2_mask helper to set them.

At the same time complete the documentation of the said register.

Signed-off-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 23548dab
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+3 −12
Original line number Diff line number Diff line
@@ -393,18 +393,9 @@ int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip)

int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip)
{
	u16 val;
	int err;

	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL2, &val);
	if (err)
		return err;

	val |= MV88E6XXX_G1_CTL2_HIST_RX_TX;

	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL2, val);

	return err;
	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_HIST_MODE_MASK,
				      MV88E6390_G1_CTL2_HIST_MODE_RX |
				      MV88E6390_G1_CTL2_HIST_MODE_TX);
}

int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index)
+9 −3
Original line number Diff line number Diff line
@@ -201,12 +201,13 @@

/* Offset 0x1C: Global Control 2 */
#define MV88E6XXX_G1_CTL2			0x1c
#define MV88E6XXX_G1_CTL2_HIST_RX		0x0040
#define MV88E6XXX_G1_CTL2_HIST_TX		0x0080
#define MV88E6XXX_G1_CTL2_HIST_RX_TX		0x00c0
#define MV88E6185_G1_CTL2_CASCADE_PORT_MASK	0xf000
#define MV88E6185_G1_CTL2_CASCADE_PORT_NONE	0xe000
#define MV88E6185_G1_CTL2_CASCADE_PORT_MULTI	0xf000
#define MV88E6352_G1_CTL2_HEADER_TYPE_MASK	0xc000
#define MV88E6352_G1_CTL2_HEADER_TYPE_ORIG	0x0000
#define MV88E6352_G1_CTL2_HEADER_TYPE_MGMT	0x4000
#define MV88E6390_G1_CTL2_HEADER_TYPE_LAG	0x8000
#define MV88E6352_G1_CTL2_RMU_MODE_MASK		0x3000
#define MV88E6352_G1_CTL2_RMU_MODE_DISABLED	0x0000
#define MV88E6352_G1_CTL2_RMU_MODE_PORT_4	0x1000
@@ -223,6 +224,11 @@
#define MV88E6390_G1_CTL2_RMU_MODE_PORT_10	0x0300
#define MV88E6390_G1_CTL2_RMU_MODE_ALL_DSA	0x0600
#define MV88E6390_G1_CTL2_RMU_MODE_DISABLED	0x0700
#define MV88E6390_G1_CTL2_HIST_MODE_MASK	0x00c0
#define MV88E6390_G1_CTL2_HIST_MODE_RX		0x0040
#define MV88E6390_G1_CTL2_HIST_MODE_TX		0x0080
#define MV88E6352_G1_CTL2_CTR_MODE_MASK		0x0060
#define MV88E6390_G1_CTL2_CTR_MODE		0x0020
#define MV88E6XXX_G1_CTL2_DEVICE_NUMBER_MASK	0x001f

/* Offset 0x1D: Stats Operation Register */