Commit 40403c1b authored by Juston Li's avatar Juston Li Committed by Greg Kroah-Hartman
Browse files

staging: sm750fb: add missing blank line after declarations



Fixes checkpatch.pl
WARNING: Missing a blank line after declarations

Signed-off-by: default avatarJuston Li <juston.h.li@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 7b05cbe8
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+1 −0
Original line number Diff line number Diff line
@@ -474,6 +474,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
			M += (fl_quo*X % 10000) > 5000?1:0;
			if (M < 256 && M > 0) {
				unsigned int diff;

				tmpClock = pll->inputFreq * M / N / X;
				diff = absDiff(tmpClock, request_orig);
				if (diff < miniDiff) {
+2 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ static void setDisplayControl(int ctrl, int dispState)
static void waitNextVerticalSync(int ctrl, int delay)
{
	unsigned int status;

	if (!ctrl) {
		/* primary controller */

@@ -210,6 +211,7 @@ static void swPanelPowerSequence(int disp, int delay)
void ddk750_setLogicalDispOut(disp_output_t output)
{
	unsigned int reg;

	if (output & PNL_2_USAGE) {
		/* set panel path controller select */
		reg = PEEK32(PANEL_DISPLAY_CTRL);
+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ int dviInit(
			)
{
	dvi_ctrl_device_t *pCurrentDviCtrl;

	pCurrentDviCtrl = g_dcftSupportedDviController;
	if (pCurrentDviCtrl->pfnInit != NULL) {
		return pCurrentDviCtrl->pfnInit(edgeSelect, busSelect, dualEdgeClkSelect, hsyncEnable,
+3 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
	int ret = 0;
	int cnt = 0;
	unsigned int ulTmpValue, ulReg;

	if (pll->clockType == SECONDARY_PLL) {
		/* programe secondary pixel clock */
		POKE32(CRT_PLL_CTRL, formatPllReg(pll));
@@ -120,6 +121,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)

	} else if (pll->clockType == PRIMARY_PLL) {
		unsigned int ulReservedBits;

		POKE32(PANEL_PLL_CTRL, formatPllReg(pll));

		POKE32(PANEL_HORIZONTAL_TOTAL,
@@ -184,6 +186,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
{
	pll_value_t pll;
	unsigned int uiActualPixelClk;

	pll.inputFreq = DEFAULT_INPUT_CLOCK;
	pll.clockType = clock;

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@
void ddk750_setDPMS(DPMS_t state)
{
	unsigned int value;

	if (getChipType() == SM750LE) {
		value = PEEK32(CRT_DISPLAY_CTRL);
		POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL, DPMS, state));
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