Commit 4029632c authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull more MIPS updates from Ralf Baechle:
 "This is the secondnd batch of MIPS patches for 4.7. Summary:

  CPS:
   - Copy EVA configuration when starting secondary VPs.

  EIC:
   - Clear Status IPL.

  Lasat:
   - Fix a few off by one bugs.

  lib:
   - Mark intrinsics notrace.  Not only are the intrinsics
     uninteresting, it would cause infinite recursion.

  MAINTAINERS:
   - Add file patterns for MIPS BRCM device tree bindings.
   - Add file patterns for mips device tree bindings.

  MT7628:
   - Fix MT7628 pinmux typos.
   - wled_an pinmux gpio.
   - EPHY LEDs pinmux support.

  Pistachio:
   - Enable KASLR

  VDSO:
   - Build microMIPS VDSO for microMIPS kernels.
   - Fix aliasing warning by building with `-fno-strict-aliasing' for
     debugging but also tracing them might result in recursion.

  Misc:
   - Add missing FROZEN hotplug notifier transitions.
   - Fix clk binding example for varioius PIC32 devices.
   - Fix cpu interrupt controller node-names in the DT files.
   - Fix XPA CPU feature separation.
   - Fix write_gc0_* macros when writing zero.
   - Add inline asm encoding helpers.
   - Add missing VZ accessor microMIPS encodings.
   - Fix little endian microMIPS MSA encodings.
   - Add 64-bit HTW fields and fix its configuration.
   - Fix sigreturn via VDSO on microMIPS kernel.
   - Lots of typo fixes.
   - Add definitions of SegCtl registers and use them"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits)
  MIPS: Add missing FROZEN hotplug notifier transitions
  MIPS: Build microMIPS VDSO for microMIPS kernels
  MIPS: Fix sigreturn via VDSO on microMIPS kernel
  MIPS: devicetree: fix cpu interrupt controller node-names
  MIPS: VDSO: Build with `-fno-strict-aliasing'
  MIPS: Pistachio: Enable KASLR
  MIPS: lib: Mark intrinsics notrace
  MIPS: Fix 64-bit HTW configuration
  MIPS: Add 64-bit HTW fields
  MAINTAINERS: Add file patterns for mips device tree bindings
  MAINTAINERS: Add file patterns for mips brcm device tree bindings
  MIPS: Simplify DSP instruction encoding macros
  MIPS: Add missing tlbinvf/XPA microMIPS encodings
  MIPS: Fix little endian microMIPS MSA encodings
  MIPS: Add missing VZ accessor microMIPS encodings
  MIPS: Add inline asm encoding helpers
  MIPS: Spelling fix lets -> let's
  MIPS: VR41xx: Fix typo
  MIPS: oprofile: Fix typo
  MIPS: math-emu: Fix typo
  ...
parents d66492bc a8c5ddf0
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+1 −1
Original line number Original line Diff line number Diff line
@@ -33,7 +33,7 @@ gpio0: gpio0@1f860000 {
	gpio-controller;
	gpio-controller;
	interrupt-controller;
	interrupt-controller;
	#interrupt-cells = <2>;
	#interrupt-cells = <2>;
	clocks = <&PBCLK4>;
	clocks = <&rootclk PB4CLK>;
	microchip,gpio-bank = <0>;
	microchip,gpio-bank = <0>;
	gpio-ranges = <&pic32_pinctrl 0 0 16>;
	gpio-ranges = <&pic32_pinctrl 0 0 16>;
};
};
+1 −1
Original line number Original line Diff line number Diff line
@@ -13,7 +13,7 @@ Required properties:
- compatible : Should be "mti,cpu-interrupt-controller"
- compatible : Should be "mti,cpu-interrupt-controller"


Example devicetree:
Example devicetree:
	cpu-irq: cpu-irq@0 {
	cpu-irq: cpu-irq {
		#address-cells = <0>;
		#address-cells = <0>;


		interrupt-controller;
		interrupt-controller;
+1 −1
Original line number Original line Diff line number Diff line
@@ -20,7 +20,7 @@ Example:
		compatible = "microchip,pic32mzda-sdhci";
		compatible = "microchip,pic32mzda-sdhci";
		reg = <0x1f8ec000 0x100>;
		reg = <0x1f8ec000 0x100>;
		interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&REFCLKO4>, <&PBCLK5>;
		clocks = <&rootclk REF4CLK>, <&rootclk PB5CLK>;
		clock-names = "base_clk", "sys_clk";
		clock-names = "base_clk", "sys_clk";
		bus-width = <4>;
		bus-width = <4>;
		cap-sd-highspeed;
		cap-sd-highspeed;
+1 −1
Original line number Original line Diff line number Diff line
@@ -34,7 +34,7 @@ pic32_pinctrl: pinctrl@1f801400{
	#size-cells = <1>;
	#size-cells = <1>;
	compatible = "microchip,pic32mzda-pinctrl";
	compatible = "microchip,pic32mzda-pinctrl";
	reg = <0x1f801400 0x400>;
	reg = <0x1f801400 0x400>;
	clocks = <&PBCLK1>;
	clocks = <&rootclk PB1CLK>;


	pinctrl_uart2: pinctrl_uart2 {
	pinctrl_uart2: pinctrl_uart2 {
		uart2-tx {
		uart2-tx {
+1 −1
Original line number Original line Diff line number Diff line
@@ -20,7 +20,7 @@ Example:
		interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
		interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
			<113 IRQ_TYPE_LEVEL_HIGH>,
			<113 IRQ_TYPE_LEVEL_HIGH>,
			<114 IRQ_TYPE_LEVEL_HIGH>;
			<114 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&PBCLK2>;
		clocks = <&rootclk PB2CLK>;
		pinctrl-names = "default";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_uart1
		pinctrl-0 = <&pinctrl_uart1
				&pinctrl_uart1_cts
				&pinctrl_uart1_cts
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