Commit 4022d039 authored by Niklas Cassel's avatar Niklas Cassel Committed by David S. Miller
Browse files

net: smmac: allow configuring lower pbl values 



The driver currently always sets the PBLx8/PBLx4 bit, which means that
the pbl values configured via the pbl/txpbl/rxpbl DT properties are
always multiplied by 8/4 in the hardware.

In order to allow the DT to configure lower pbl values, while at the
same time not changing behavior of any existing device trees using the
pbl/txpbl/rxpbl settings, add a property to disable the multiplication
of the pbl by 8/4 in the hardware.

Suggested-by: default avatarRabin Vincent <rabinv@axis.com>
Signed-off-by: default avatarNiklas Cassel <niklas.cassel@axis.com>
Acked-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 89caaa2d

Documentation/devicetree/bindings/net/stmmac.txt

+2 −0
Original line number Diff line number Diff line
@@ -39,6 +39,8 @@ Optional properties: 
			If set, DMA tx will use this value rather than snps,pbl.

- snps,rxpbl		Rx Programmable Burst Length. Only for GMAC and newer.

			If set, DMA rx will use this value rather than snps,pbl.

- snps,no-pbl-x8	Don't multiply the pbl/txpbl/rxpbl values by 8.

			For core rev < 3.50, don't multiply the values by 4.

- snps,aal		Address-Aligned Beats

- snps,fixed-burst	Program the DMA to use the fixed burst mode

- snps,mixed-burst	Program the DMA to use the mixed burst mode

Documentation/networking/stmmac.txt

+4 −1
Original line number Diff line number Diff line
@@ -152,8 +152,9 @@ Where: 
 o dma_cfg: internal DMA parameters

   o pbl: the Programmable Burst Length is maximum number of beats to

       be transferred in one DMA transaction.

       GMAC also enables the 4xPBL by default.

       GMAC also enables the 4xPBL by default. (8xPBL for GMAC 3.50 and newer)

   o txpbl/rxpbl: GMAC and newer supports independent DMA pbl for tx/rx.

   o pblx8: Enable 8xPBL (4xPBL for core rev < 3.50). Enabled by default.

   o fixed_burst/mixed_burst/aal

 o clk_csr: fixed CSR Clock range selection.

 o has_gmac: uses the GMAC core.
@@ -208,6 +209,7 @@ struct stmmac_dma_cfg { 
	int pbl;

	int txpbl;

	int rxpbl;

	bool pblx8;

	int fixed_burst;

	int mixed_burst;

	bool aal;
@@ -219,6 +221,7 @@ Where: 
	 If set, DMA tx will use this value rather than pbl.

 o rxpbl: Receive Programmable Burst Length. Only for GMAC and newer.

	 If set, DMA rx will use this value rather than pbl.

 o pblx8: Enable 8xPBL (4xPBL for core rev < 3.50). Enabled by default.

 o fixed_burst: program the DMA to use the fixed burst mode

 o mixed_burst: program the DMA to use the mixed burst mode

 o aal: Address-Aligned Beats

drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c

+2 −1
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ static void dwmac1000_dma_init(void __iomem *ioaddr, 
	 * Note: before stmmac core 3.50 this mode bit was 4xPBL, and

	 * post 3.5 mode bit acts as 8*PBL.

	 */

	if (dma_cfg->pblx8)

		value |= DMA_BUS_MODE_MAXPBL;

	value |= DMA_BUS_MODE_USP;

	value &= ~(DMA_BUS_MODE_PBL_MASK | DMA_BUS_MODE_RPBL_MASK);

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

+2 −1
Original line number Diff line number Diff line
@@ -84,6 +84,7 @@ static void dwmac4_dma_init_channel(void __iomem *ioaddr, 
	 * on each channel

	 */

	value = readl(ioaddr + DMA_CHAN_CONTROL(channel));

	if (dma_cfg->pblx8)

		value = value | DMA_BUS_MODE_PBL;

	writel(value, ioaddr + DMA_CHAN_CONTROL(channel));

drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c

+2 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ static void stmmac_default_data(struct plat_stmmacenet_data *plat) 
	plat->mdio_bus_data->phy_mask = 0;



	plat->dma_cfg->pbl = 32;

	plat->dma_cfg->pblx8 = true;

	/* TODO: AXI */



	/* Set default value for multicast hash bins */
@@ -115,6 +116,7 @@ static int quark_default_data(struct plat_stmmacenet_data *plat, 
	plat->mdio_bus_data->phy_mask = 0;



	plat->dma_cfg->pbl = 16;

	plat->dma_cfg->pblx8 = true;

	plat->dma_cfg->fixed_burst = 1;

	/* AXI (TODO) */

CRA Git | Maintained and supported by SUSTech CRA and CCSE