Unverified Commit 4021c30a authored by Paul Burton's avatar Paul Burton
Browse files

MIPS: Add kernel_pref & user_pref helpers 



Add kernel_pref & user_pref macros to asm/asm-eva.h, providing an
abstraction around EVA & non-EVA pref instructions consistent with the
existing macros we have for cache & load/store instructions.

Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20906/
Cc: linux-mips@linux-mips.org
parent da1d25e7

arch/mips/include/asm/asm-eva.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -15,6 +15,7 @@ 
/* Kernel variants */

/* Kernel variants */





#define kernel_cache(op, base)		"cache " op ", " base "\n"

#define kernel_cache(op, base)		"cache " op ", " base "\n"

#define kernel_pref(hint, base)		"pref " hint ", " base "\n"

#define kernel_ll(reg, addr)		"ll " reg ", " addr "\n"

#define kernel_ll(reg, addr)		"ll " reg ", " addr "\n"

#define kernel_sc(reg, addr)		"sc " reg ", " addr "\n"

#define kernel_sc(reg, addr)		"sc " reg ", " addr "\n"

#define kernel_lw(reg, addr)		"lw " reg ", " addr "\n"

#define kernel_lw(reg, addr)		"lw " reg ", " addr "\n"
@@ -51,6 +52,7 @@ 
				"	.set	pop\n"

				"	.set	pop\n"





#define user_cache(op, base)		__BUILD_EVA_INSN("cachee", op, base)

#define user_cache(op, base)		__BUILD_EVA_INSN("cachee", op, base)

#define user_pref(hint, base)		__BUILD_EVA_INSN("prefe", hint, base)

#define user_ll(reg, addr)		__BUILD_EVA_INSN("lle", reg, addr)

#define user_ll(reg, addr)		__BUILD_EVA_INSN("lle", reg, addr)

#define user_sc(reg, addr)		__BUILD_EVA_INSN("sce", reg, addr)

#define user_sc(reg, addr)		__BUILD_EVA_INSN("sce", reg, addr)

#define user_lw(reg, addr)		__BUILD_EVA_INSN("lwe", reg, addr)

#define user_lw(reg, addr)		__BUILD_EVA_INSN("lwe", reg, addr)
@@ -72,6 +74,7 @@ 
#else

#else





#define user_cache(op, base)		kernel_cache(op, base)

#define user_cache(op, base)		kernel_cache(op, base)

#define user_pref(hint, base)		kernel_pref(hint, base)

#define user_ll(reg, addr)		kernel_ll(reg, addr)

#define user_ll(reg, addr)		kernel_ll(reg, addr)

#define user_sc(reg, addr)		kernel_sc(reg, addr)

#define user_sc(reg, addr)		kernel_sc(reg, addr)

#define user_lw(reg, addr)		kernel_lw(reg, addr)

#define user_lw(reg, addr)		kernel_lw(reg, addr)
@@ -99,6 +102,7 @@ 
#else /* __ASSEMBLY__ */

#else /* __ASSEMBLY__ */





#define kernel_cache(op, base)		cache op, base

#define kernel_cache(op, base)		cache op, base

#define kernel_pref(hint, base)		pref hint, base

#define kernel_ll(reg, addr)		ll reg, addr

#define kernel_ll(reg, addr)		ll reg, addr

#define kernel_sc(reg, addr)		sc reg, addr

#define kernel_sc(reg, addr)		sc reg, addr

#define kernel_lw(reg, addr)		lw reg, addr

#define kernel_lw(reg, addr)		lw reg, addr
@@ -135,6 +139,7 @@ 
				.set	pop;

				.set	pop;





#define user_cache(op, base)		__BUILD_EVA_INSN(cachee, op, base)

#define user_cache(op, base)		__BUILD_EVA_INSN(cachee, op, base)

#define user_pref(hint, base)		__BUILD_EVA_INSN(prefe, hint, base)

#define user_ll(reg, addr)		__BUILD_EVA_INSN(lle, reg, addr)

#define user_ll(reg, addr)		__BUILD_EVA_INSN(lle, reg, addr)

#define user_sc(reg, addr)		__BUILD_EVA_INSN(sce, reg, addr)

#define user_sc(reg, addr)		__BUILD_EVA_INSN(sce, reg, addr)

#define user_lw(reg, addr)		__BUILD_EVA_INSN(lwe, reg, addr)

#define user_lw(reg, addr)		__BUILD_EVA_INSN(lwe, reg, addr)
@@ -155,6 +160,7 @@ 
#else

#else





#define user_cache(op, base)		kernel_cache(op, base)

#define user_cache(op, base)		kernel_cache(op, base)

#define user_pref(hint, base)		kernel_pref(hint, base)

#define user_ll(reg, addr)		kernel_ll(reg, addr)

#define user_ll(reg, addr)		kernel_ll(reg, addr)

#define user_sc(reg, addr)		kernel_sc(reg, addr)

#define user_sc(reg, addr)		kernel_sc(reg, addr)

#define user_lw(reg, addr)		kernel_lw(reg, addr)

#define user_lw(reg, addr)		kernel_lw(reg, addr)

CRA Git | Maintained and supported by SUSTech CRA and CCSE