Commit 401dca8c authored May 14, 2018 by Philippe Bergheaud Committed by Michael Ellerman May 15, 2018

cxl: Set the PBCQ Tunnel BAR register when enabling capi mode



Skiboot used to set the default Tunnel BAR register value when capi
mode was enabled. This approach was ok for the cxl driver, but
prevented other drivers from choosing different values.

Skiboot versions > 5.11 will not set the default value any longer.
This patch modifies the cxl driver to set/reset the Tunnel BAR
register when entering/exiting the cxl mode, with
pnv_pci_set_tunnel_bar().

That should work with old skiboot (since we are re-writing the value
already set) and new skiboot.

mpe: The tunnel support was only merged into Linux recently, in commit
d6a90bb8 ("powerpc/powernv: Enable tunneled operations")
(v4.17-rc1), so with new skiboot kernels between that commit and this
will not work correctly.

Fixes: d6a90bb8 ("powerpc/powernv: Enable tunneled operations")
Signed-off-by: Philippe Bergheaud <felix@linux.ibm.com>
Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

parent 6c0a8f6b

drivers/misc/cxl/pci.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -1742,6 +1742,10 @@ static int cxl_configure_adapter(struct cxl adapter, struct pci_dev dev)
		/* Required for devices using CAPP DMA mode, harmless for others */
		pci_set_master(dev);

		if (cxl_is_power9())
		if (pnv_pci_set_tunnel_bar(dev, 0x00020000E0000000ull, 1))
		dev_info(&dev->dev, "Tunneled operations unsupported\n");

		if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
		goto err;

		@@ -1768,6 +1772,9 @@ static void cxl_deconfigure_adapter(struct cxl *adapter)
		{
		struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);

		if (cxl_is_power9())
		pnv_pci_set_tunnel_bar(pdev, 0x00020000E0000000ull, 0);

		cxl_native_release_psl_err_irq(adapter);
		cxl_unmap_adapter_regs(adapter);

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