Commit 3fe4818e authored Jul 02, 2020 by Stanislav Lisovskiy Committed by Jani Nikula Jul 03, 2020

drm/i915/tgl: Clamp min_cdclk to max_cdclk_freq to unblock 8K



We still need "Bump up CDCLK" workaround otherwise getting
underruns - however currently it blocks 8K as CDCLK = Pixel rate,
in 8K case would require CDCLK to be around 1 Ghz which is not
possible.

v2: - Convert to expression(max(min_cdclk, min(pixel_rate, max_cdclk))
      (Ville Syrjälä)
    - Use type specific min_t, max_t(Ville Syrjälä)

Fixes: 46d53e27 ("Revert "drm/i915: Remove unneeded hack now for CDCLK"")
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200702091526.10096-1-stanislav.lisovskiy@intel.com

parent ba06216d

drivers/gpu/drm/i915/display/intel_cdclk.c

+9 −2

Original line number	Diff line number	Diff line
		@@ -2080,8 +2080,15 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
		* Explicitly stating here that this seems to be currently
		* rather a Hack, than final solution.
		*/
		if (IS_TIGERLAKE(dev_priv))
		min_cdclk = max(min_cdclk, (int)crtc_state->pixel_rate);
		if (IS_TIGERLAKE(dev_priv)) {
		/*
		* Clamp to max_cdclk_freq in case pixel rate is higher,
		* in order not to break an 8K, but still leave W/A at place.
		*/
		min_cdclk = max_t(int, min_cdclk,
		min_t(int, crtc_state->pixel_rate,
		dev_priv->max_cdclk_freq));
		}

		if (min_cdclk > dev_priv->max_cdclk_freq) {
		drm_dbg_kms(&dev_priv->drm,

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