KVM: arm/arm64: Add ARM user space interrupt signaling ABI (3fe17e68) · Commits · 戴 / test

Documentation/virtual/kvm/api.txt

+42 −0

Original line number	Diff line number	Diff line
		@@ -4147,3 +4147,45 @@ This capability, if KVM_CHECK_EXTENSION indicates that it is
		available, means that that the kernel can support guests using the
		hashed page table MMU defined in Power ISA V3.00 (as implemented in
		the POWER9 processor), including in-memory segment tables.


		8.5 KVM_CAP_ARM_USER_IRQ

		Architectures: arm, arm64
		This capability, if KVM_CHECK_EXTENSION indicates that it is available, means
		that if userspace creates a VM without an in-kernel interrupt controller, it
		will be notified of changes to the output level of in-kernel emulated devices,
		which can generate virtual interrupts, presented to the VM.
		For such VMs, on every return to userspace, the kernel
		updates the vcpu's run->s.regs.device_irq_level field to represent the actual
		output level of the device.

		Whenever kvm detects a change in the device output level, kvm guarantees at
		least one return to userspace before running the VM. This exit could either
		be a KVM_EXIT_INTR or any other exit event, like KVM_EXIT_MMIO. This way,
		userspace can always sample the device output level and re-compute the state of
		the userspace interrupt controller. Userspace should always check the state
		of run->s.regs.device_irq_level on every kvm exit.
		The value in run->s.regs.device_irq_level can represent both level and edge
		triggered interrupt signals, depending on the device. Edge triggered interrupt
		signals will exit to userspace with the bit in run->s.regs.device_irq_level
		set exactly once per edge signal.

		The field run->s.regs.device_irq_level is available independent of
		run->kvm_valid_regs or run->kvm_dirty_regs bits.

		If KVM_CAP_ARM_USER_IRQ is supported, the KVM_CHECK_EXTENSION ioctl returns a
		number larger than 0 indicating the version of this capability is implemented
		and thereby which bits in in run->s.regs.device_irq_level can signal values.

		Currently the following bits are defined for the device_irq_level bitmap:

		KVM_CAP_ARM_USER_IRQ >= 1:

		KVM_ARM_DEV_EL1_VTIMER - EL1 virtual timer
		KVM_ARM_DEV_EL1_PTIMER - EL1 physical timer
		KVM_ARM_DEV_PMU - ARM PMU overflow interrupt signal

		Future versions of kvm may implement additional events. These will get
		indicated by returning a higher number from KVM_CHECK_EXTENSION and will be
		listed above.

arch/arm/include/uapi/asm/kvm.h

+2 −0

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		@@ -114,6 +114,8 @@ struct kvm_debug_exit_arch {
		};

		struct kvm_sync_regs {
		/* Used with KVM_CAP_ARM_USER_IRQ */
		__u64 device_irq_level;
		};

		struct kvm_arch_memory_slot {

arch/arm64/include/uapi/asm/kvm.h

+2 −0

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		@@ -143,6 +143,8 @@ struct kvm_debug_exit_arch {
		#define KVM_GUESTDBG_USE_HW (1 << 17)

		struct kvm_sync_regs {
		/* Used with KVM_CAP_ARM_USER_IRQ */
		__u64 device_irq_level;
		};

		struct kvm_arch_memory_slot {

include/uapi/linux/kvm.h

+8 −0

Original line number	Diff line number	Diff line
		@@ -883,6 +883,7 @@ struct kvm_ppc_resize_hpt {
		#define KVM_CAP_PPC_MMU_RADIX 134
		#define KVM_CAP_PPC_MMU_HASH_V3 135
		#define KVM_CAP_IMMEDIATE_EXIT 136
		#define KVM_CAP_ARM_USER_IRQ 137

		#ifdef KVM_CAP_IRQ_ROUTING

		@@ -1354,4 +1355,11 @@ struct kvm_assigned_msix_entry {
		#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
		#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)

		/* Available with KVM_CAP_ARM_USER_IRQ */

		/* Bits for run->s.regs.device_irq_level */
		#define KVM_ARM_DEV_EL1_VTIMER (1 << 0)
		#define KVM_ARM_DEV_EL1_PTIMER (1 << 1)
		#define KVM_ARM_DEV_PMU (1 << 2)

		#endif /* __LINUX_KVM_H */

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