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Commit 3f905469 authored Sep 09, 2019 by Taniya Das Committed by Stephen Boyd Sep 09, 2019

clk: qcom: gcc: Use floor ops for SDCC clocks



Update global clock controller SDCC2/4 clocks to use the floor rcg ops,
so as to use the rounded down clock rates for these clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/20190909074410.18977-1-tdas@codeaurora.org


Signed-off-by: Stephen Boyd <sboyd@kernel.org>

parent 59302081

drivers/clk/qcom/gcc-ipq8074.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1108,7 +1108,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = {
		.name = "sdcc2_apps_clk_src",
		.parent_names = gcc_xo_gpll0_gpll2_gpll0_out_main_div2,
		.num_parents = 4,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_floor_ops,
		},
		};

drivers/clk/qcom/gcc-msm8998.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -1042,7 +1042,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = {
		.name = "sdcc2_apps_clk_src",
		.parent_names = gcc_parent_names_4,
		.num_parents = 4,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_floor_ops,
		},
		};

		@@ -1066,7 +1066,7 @@ static struct clk_rcg2 sdcc4_apps_clk_src = {
		.name = "sdcc4_apps_clk_src",
		.parent_names = gcc_parent_names_1,
		.num_parents = 3,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_floor_ops,
		},
		};

drivers/clk/qcom/gcc-sdm660.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -787,7 +787,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = {
		.name = "sdcc2_apps_clk_src",
		.parent_names = gcc_parent_names_xo_gpll0_gpll0_early_div_gpll4,
		.num_parents = 4,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_floor_ops,
		},
		};

drivers/clk/qcom/gcc-sm8150.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -803,7 +803,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
		.parent_data = gcc_parents_6,
		.num_parents = 5,
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_floor_ops,
		},
		};

		@@ -828,7 +828,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = {
		.parent_data = gcc_parents_3,
		.num_parents = 3,
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_rcg2_ops,
		.ops = &clk_rcg2_floor_ops,
		},
		};

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