Commit 3f3c8be9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus-5.5a-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip

Pull xen updates from Juergen Gross:

 - a small series to remove the build constraint of Xen x86 MCE handling
   to 64-bit only

 - a bunch of minor cleanups

* tag 'for-linus-5.5a-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  xen: Fix Kconfig indentation
  xen/mcelog: also allow building for 32-bit kernels
  xen/mcelog: add PPIN to record when available
  xen/mcelog: drop __MC_MSR_MCGCAP
  xen/gntdev: Use select for DMA_SHARED_BUFFER
  xen: mm: make xen_mm_init static
  xen: mm: include <xen/xen-ops.h> for missing declarations
parents 2981dcf3 23c1cce9
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+2 −1
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@
#include <xen/interface/grant_table.h>
#include <xen/interface/memory.h>
#include <xen/page.h>
#include <xen/xen-ops.h>
#include <xen/swiotlb-xen.h>

#include <asm/cacheflush.h>
@@ -133,7 +134,7 @@ void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
	return;
}

int __init xen_mm_init(void)
static int __init xen_mm_init(void)
{
	struct gnttab_cache_flush cflush;
	if (!xen_initial_domain())
+2 −0
Original line number Diff line number Diff line
@@ -409,6 +409,8 @@
#define MSR_AMD_PSTATE_DEF_BASE		0xc0010064
#define MSR_AMD64_OSVW_ID_LENGTH	0xc0010140
#define MSR_AMD64_OSVW_STATUS		0xc0010141
#define MSR_AMD_PPIN_CTL		0xc00102f0
#define MSR_AMD_PPIN			0xc00102f1
#define MSR_AMD64_LS_CFG		0xc0011020
#define MSR_AMD64_DC_CFG		0xc0011022
#define MSR_AMD64_BU_CFG2		0xc001102a
+32 −31
Original line number Diff line number Diff line
@@ -141,7 +141,8 @@ config XEN_GNTDEV

config XEN_GNTDEV_DMABUF
	bool "Add support for dma-buf grant access device driver extension"
	depends on XEN_GNTDEV && XEN_GRANT_DMA_ALLOC && DMA_SHARED_BUFFER
	depends on XEN_GNTDEV && XEN_GRANT_DMA_ALLOC
	select DMA_SHARED_BUFFER
	help
	  Allows userspace processes and kernel modules to use Xen backed
	  dma-buf implementation. With this extension grant references to
@@ -285,7 +286,7 @@ config XEN_ACPI_PROCESSOR

config XEN_MCE_LOG
	bool "Xen platform mcelog"
	depends on XEN_DOM0 && X86_64 && X86_MCE
	depends on XEN_DOM0 && X86_MCE
	help
	  Allow kernel fetching MCE error from Xen platform and
	  converting it into Linux mcelog format for mcelog tools
+12 −2
Original line number Diff line number Diff line
@@ -222,7 +222,7 @@ static int convert_log(struct mc_info *mi)
	struct mcinfo_global *mc_global;
	struct mcinfo_bank *mc_bank;
	struct xen_mce m;
	uint32_t i;
	unsigned int i, j;

	mic = NULL;
	x86_mcinfo_lookup(&mic, mi, MC_TYPE_GLOBAL);
@@ -248,7 +248,17 @@ static int convert_log(struct mc_info *mi)
	m.socketid = g_physinfo[i].mc_chipid;
	m.cpu = m.extcpu = g_physinfo[i].mc_cpunr;
	m.cpuvendor = (__u8)g_physinfo[i].mc_vendor;
	m.mcgcap = g_physinfo[i].mc_msrvalues[__MC_MSR_MCGCAP].value;
	for (j = 0; j < g_physinfo[i].mc_nmsrvals; ++j)
		switch (g_physinfo[i].mc_msrvalues[j].reg) {
		case MSR_IA32_MCG_CAP:
			m.mcgcap = g_physinfo[i].mc_msrvalues[j].value;
			break;

		case MSR_PPIN:
		case MSR_AMD_PPIN:
			m.ppin = g_physinfo[i].mc_msrvalues[j].value;
			break;
		}

	mic = NULL;
	x86_mcinfo_lookup(&mic, mi, MC_TYPE_BANK);
+8 −2
Original line number Diff line number Diff line
@@ -183,7 +183,6 @@ struct mc_info {
DEFINE_GUEST_HANDLE_STRUCT(mc_info);

#define __MC_MSR_ARRAYSIZE 8
#define __MC_MSR_MCGCAP 0
#define __MC_NMSRS 1
#define MC_NCAPS 7
struct mcinfo_logical_cpu {
@@ -332,7 +331,11 @@ struct xen_mc {
};
DEFINE_GUEST_HANDLE_STRUCT(xen_mc);

/* Fields are zero when not available */
/*
 * Fields are zero when not available. Also, this struct is shared with
 * userspace mcelog and thus must keep existing fields at current offsets.
 * Only add new fields to the end of the structure
 */
struct xen_mce {
	__u64 status;
	__u64 misc;
@@ -353,6 +356,9 @@ struct xen_mce {
	__u32 socketid;	/* CPU socket ID */
	__u32 apicid;	/* CPU initial apic ID */
	__u64 mcgcap;	/* MCGCAP MSR: machine check capabilities of CPU */
	__u64 synd;	/* MCA_SYND MSR: only valid on SMCA systems */
	__u64 ipid;	/* MCA_IPID MSR: only valid on SMCA systems */
	__u64 ppin;	/* Protected Processor Inventory Number */
};

/*