Commit 3f1b540d authored by Yinghai Lu's avatar Yinghai Lu Committed by Bjorn Helgaas
Browse files

sparc/PCI: register busn_res for root buses 



Add the host bridge bus number aperture to the resource list.
Like the MMIO and I/O port apertures, this is used when assigning
resources to hot-added devices or in the case of conflicts.

[bhelgaas: changelog, fix "pci_last_busn" typo]
Acked-by: default avatar"David S. Miller" <davem@davemloft.net>
CC: sparclinux@vger.kernel.org
Signed-off-by: default avatarYinghai Lu <yinghai@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 2661b819

arch/sparc/kernel/pci.c

+5 −3
Original line number Diff line number Diff line
@@ -535,7 +535,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm, 
	}



	bus->primary = dev->bus->number;

	bus->busn_res.end = busrange[1];

	pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);

	bus->bridge_ctl = 0;



	/* parse ranges property, or cook one up by hand for Simba */
@@ -685,6 +685,10 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, 
				pbm->io_space.start);

	pci_add_resource_offset(&resources, &pbm->mem_space,

				pbm->mem_space.start);

	pbm->busn.start = pbm->pci_first_busno;

	pbm->busn.end	= pbm->pci_last_busno;

	pbm->busn.flags	= IORESOURCE_BUS;

	pci_add_resource(&resources, &pbm->busn);

	bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,

				  pbm, &resources);

	if (!bus) {
@@ -693,8 +697,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, 
		pci_free_resource_list(&resources);

		return NULL;

	}

	bus->busn_res.start = pbm->pci_first_busno;

	bus->busn_res.end = pbm->pci_last_busno;



	pci_of_scan_bus(pbm, node, bus);

	pci_bus_add_devices(bus);

arch/sparc/kernel/pci_impl.h

+1 −0
Original line number Diff line number Diff line
@@ -97,6 +97,7 @@ struct pci_pbm_info { 
	/* PBM I/O and Memory space resources. */

	struct resource			io_space;

	struct resource			mem_space;

	struct resource			busn;



	/* Base of PCI Config space, can be per-PBM or shared. */

	unsigned long			config_space;

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