Commit 3f135530 authored by Shane McDonald's avatar Shane McDonald Committed by Ralf Baechle
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MIPS: Coding style cleanups of access of FCSR rounding mode bits 



Replaces references to the magic number 0x3 with constants and macros
indicating the real purpose of those bits.  They are the rounding mode
bits of the FCSR register.

Signed-off-by: default avatarShane McDonald <mcdonald.shane@gmail.com>
To: anemo@mba.ocn.ne.jp
To: kevink@paralogos.com
To: linux-mips@linux-mips.org
To: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/1206/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c197da91

arch/mips/math-emu/cp1emu.c

+6 −5
Original line number Diff line number Diff line
@@ -354,7 +354,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) 


			if (MIPSInst_RD(ir) == FPCREG_CSR) {

				value = ctx->fcr31;

				value = (value & ~0x3) | mips_rm[value & 0x3];

				value = (value & ~FPU_CSR_RM) |

					mips_rm[modeindex(value)];

#ifdef CSRTRACE

				printk("%p gpr[%d]<-csr=%08x\n",

					(void *) (xcp->cp0_epc),
@@ -907,7 +908,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			ieee754sp fs;



			SPFROMREG(fs, MIPSInst_FS(ir));

			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];

			ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];

			rv.w = ieee754sp_tint(fs);

			ieee754_csr.rm = oldrm;

			rfmt = w_fmt;
@@ -933,7 +934,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			ieee754sp fs;



			SPFROMREG(fs, MIPSInst_FS(ir));

			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];

			ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];

			rv.l = ieee754sp_tlong(fs);

			ieee754_csr.rm = oldrm;

			rfmt = l_fmt;
@@ -1081,7 +1082,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			ieee754dp fs;



			DPFROMREG(fs, MIPSInst_FS(ir));

			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];

			ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];

			rv.w = ieee754dp_tint(fs);

			ieee754_csr.rm = oldrm;

			rfmt = w_fmt;
@@ -1107,7 +1108,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			ieee754dp fs;



			DPFROMREG(fs, MIPSInst_FS(ir));

			ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];

			ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];

			rv.l = ieee754dp_tlong(fs);

			ieee754_csr.rm = oldrm;

			rfmt = l_fmt;

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