Commit 3ef884b4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 

* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (189 commits)
  drm/radeon/kms: fix warning about cur_placement being uninitialised.
  drm/ttm: Print debug information on memory manager when eviction fails
  drm: Add memory manager debug function
  drm/radeon/kms: restore surface registers on resume.
  drm/radeon/kms/r600/r700: fallback gracefully on ucode failure
  drm/ttm: Initialize eviction placement in case the driver callback doesn't
  drm/radeon/kms: cleanup structure and module if initialization fails
  drm/radeon/kms: actualy set the eviction placements we choose
  drm/radeon/kms: Fix NULL ptr dereference
  drm/radeon/kms/avivo: add support for new pll selection algo
  drm/radeon/kms/avivo: fix some bugs in the display bandwidth setup
  drm/radeon/kms: fix return value from fence function.
  drm/radeon: Remove tests for -ERESTART from the TTM code.
  drm/ttm: Have the TTM code return -ERESTARTSYS instead of -ERESTART.
  drm/radeon/kms: Convert radeon to new TTM validation API (V2)
  drm/ttm: Rework validation & memory space allocation (V3)
  drm: Add search/get functions to get a block in a specific range
  drm/radeon/kms: fix avivo tiling regression since radeon object rework
  drm/i915: Remove a debugging printk from hangcheck
  drm/radeon/kms: make sure i2c id matches
  ...
parents 4e5df806 4361e52a

drivers/char/agp/intel-agp.c

+54 −49
Original line number Diff line number Diff line
@@ -36,10 +36,10 @@ 
#define PCI_DEVICE_ID_INTEL_82965GME_IG     0x2A12

#define PCI_DEVICE_ID_INTEL_82945GME_HB     0x27AC

#define PCI_DEVICE_ID_INTEL_82945GME_IG     0x27AE

#define PCI_DEVICE_ID_INTEL_IGDGM_HB        0xA010

#define PCI_DEVICE_ID_INTEL_IGDGM_IG        0xA011

#define PCI_DEVICE_ID_INTEL_IGDG_HB         0xA000

#define PCI_DEVICE_ID_INTEL_IGDG_IG         0xA001

#define PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB        0xA010

#define PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG        0xA011

#define PCI_DEVICE_ID_INTEL_PINEVIEW_HB         0xA000

#define PCI_DEVICE_ID_INTEL_PINEVIEW_IG         0xA001

#define PCI_DEVICE_ID_INTEL_G33_HB          0x29C0

#define PCI_DEVICE_ID_INTEL_G33_IG          0x29C2

#define PCI_DEVICE_ID_INTEL_Q35_HB          0x29B0
@@ -50,20 +50,20 @@ 
#define PCI_DEVICE_ID_INTEL_B43_IG          0x2E42

#define PCI_DEVICE_ID_INTEL_GM45_HB         0x2A40

#define PCI_DEVICE_ID_INTEL_GM45_IG         0x2A42

#define PCI_DEVICE_ID_INTEL_IGD_E_HB        0x2E00

#define PCI_DEVICE_ID_INTEL_IGD_E_IG        0x2E02

#define PCI_DEVICE_ID_INTEL_EAGLELAKE_HB        0x2E00

#define PCI_DEVICE_ID_INTEL_EAGLELAKE_IG        0x2E02

#define PCI_DEVICE_ID_INTEL_Q45_HB          0x2E10

#define PCI_DEVICE_ID_INTEL_Q45_IG          0x2E12

#define PCI_DEVICE_ID_INTEL_G45_HB          0x2E20

#define PCI_DEVICE_ID_INTEL_G45_IG          0x2E22

#define PCI_DEVICE_ID_INTEL_G41_HB          0x2E30

#define PCI_DEVICE_ID_INTEL_G41_IG          0x2E32

#define PCI_DEVICE_ID_INTEL_IGDNG_D_HB	    0x0040

#define PCI_DEVICE_ID_INTEL_IGDNG_D_IG	    0x0042

#define PCI_DEVICE_ID_INTEL_IGDNG_M_HB	    0x0044

#define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB	    0x0062

#define PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB    0x006a

#define PCI_DEVICE_ID_INTEL_IGDNG_M_IG	    0x0046

#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB	    0x0040

#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG	    0x0042

#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB	    0x0044

#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB	    0x0062

#define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB    0x006a

#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG	    0x0046



/* cover 915 and 945 variants */

#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
@@ -83,22 +83,22 @@ 
#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDGM_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDG_HB)

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB)



#define IS_IGD (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDGM_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDG_HB)

#define IS_PINEVIEW (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB)



#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \

#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_EAGLELAKE_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB)

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB)



extern int agp_memory_reserved;
@@ -178,6 +178,7 @@ static struct _intel_private { 
	 * popup and for the GTT.

	 */

	int gtt_entries;			/* i830+ */

	int gtt_total_size;

	union {

		void __iomem *i9xx_flush_page;

		void *i8xx_flush_page;
@@ -653,7 +654,7 @@ static void intel_i830_init_gtt_entries(void) 
			size = 512;

		}

		size += 4; /* add in BIOS popup space */

	} else if (IS_G33 && !IS_IGD) {

	} else if (IS_G33 && !IS_PINEVIEW) {

	/* G33's GTT size defined in gmch_ctrl */

		switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {

		case G33_PGETBL_SIZE_1M:
@@ -669,7 +670,7 @@ static void intel_i830_init_gtt_entries(void) 
			size = 512;

		}

		size += 4;

	} else if (IS_G4X || IS_IGD) {

	} else if (IS_G4X || IS_PINEVIEW) {

		/* On 4 series hardware, GTT stolen is separate from graphics

		 * stolen, ignore it in stolen gtt entries counting.  However,

		 * 4KB of the stolen memory doesn't get mapped to the GTT.
@@ -1153,7 +1154,7 @@ static int intel_i915_configure(void) 
	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */



	if (agp_bridge->driver->needs_scratch_page) {

		for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {

		for (i = intel_private.gtt_entries; i < intel_private.gtt_total_size; i++) {

			writel(agp_bridge->scratch_page, intel_private.gtt+i);

		}

		readl(intel_private.gtt+i-1);	/* PCI Posting. */
@@ -1308,6 +1309,8 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) 
	if (!intel_private.gtt)

		return -ENOMEM;



	intel_private.gtt_total_size = gtt_map_size / 4;



	temp &= 0xfff80000;



	intel_private.registers = ioremap(temp, 128 * 4096);
@@ -1352,15 +1355,15 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) 
{

	switch (agp_bridge->dev->device) {

	case PCI_DEVICE_ID_INTEL_GM45_HB:

	case PCI_DEVICE_ID_INTEL_IGD_E_HB:

	case PCI_DEVICE_ID_INTEL_EAGLELAKE_HB:

	case PCI_DEVICE_ID_INTEL_Q45_HB:

	case PCI_DEVICE_ID_INTEL_G45_HB:

	case PCI_DEVICE_ID_INTEL_G41_HB:

	case PCI_DEVICE_ID_INTEL_B43_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB:

	case PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB:

	case PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB:

	case PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB:

	case PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB:

		*gtt_offset = *gtt_size = MB(2);

		break;

	default:
@@ -1395,6 +1398,8 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge) 
	if (!intel_private.gtt)

		return -ENOMEM;



	intel_private.gtt_total_size = gtt_size / 4;



	intel_private.registers = ioremap(temp, 128 * 4096);

	if (!intel_private.registers) {

		iounmap(intel_private.gtt);
@@ -2340,14 +2345,14 @@ static const struct intel_driver_description { 
		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",

		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_IGDGM_HB, PCI_DEVICE_ID_INTEL_IGDGM_IG, 0, "IGD",

	{ PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG, 0, "Pineview",

		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_IGDG_HB, PCI_DEVICE_ID_INTEL_IGDG_IG, 0, "IGD",

	{ PCI_DEVICE_ID_INTEL_PINEVIEW_HB, PCI_DEVICE_ID_INTEL_PINEVIEW_IG, 0, "Pineview",

		NULL, &intel_g33_driver },

	{ PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0,

	    "Mobile Intel® GM45 Express", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,

	    "Intel Integrated Graphics Device", NULL, &intel_i965_driver },

	    "GM45", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_EAGLELAKE_HB, PCI_DEVICE_ID_INTEL_EAGLELAKE_IG, 0,

	    "Eaglelake", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,

	    "Q45/Q43", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
@@ -2356,14 +2361,14 @@ static const struct intel_driver_description { 
	    "B43", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,

	    "G41", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGDNG_D_HB, PCI_DEVICE_ID_INTEL_IGDNG_D_IG, 0,

	    "IGDNG/D", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGDNG_M_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,

	    "IGDNG/M", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,

	    "IGDNG/MA", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,

	    "IGDNG/MC2", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG, 0,

	    "Ironlake/D", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,

	    "Ironlake/M", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,

	    "Ironlake/MA", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,

	    "Ironlake/MC2", NULL, &intel_i965_driver },

	{ 0, 0, 0, NULL, NULL, NULL }

};
@@ -2545,8 +2550,8 @@ static struct pci_device_id agp_intel_pci_table[] = { 
	ID(PCI_DEVICE_ID_INTEL_82945G_HB),

	ID(PCI_DEVICE_ID_INTEL_82945GM_HB),

	ID(PCI_DEVICE_ID_INTEL_82945GME_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDGM_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDG_HB),

	ID(PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB),

	ID(PCI_DEVICE_ID_INTEL_PINEVIEW_HB),

	ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),

	ID(PCI_DEVICE_ID_INTEL_82G35_HB),

	ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
@@ -2557,15 +2562,15 @@ static struct pci_device_id agp_intel_pci_table[] = { 
	ID(PCI_DEVICE_ID_INTEL_Q35_HB),

	ID(PCI_DEVICE_ID_INTEL_Q33_HB),

	ID(PCI_DEVICE_ID_INTEL_GM45_HB),

	ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),

	ID(PCI_DEVICE_ID_INTEL_EAGLELAKE_HB),

	ID(PCI_DEVICE_ID_INTEL_Q45_HB),

	ID(PCI_DEVICE_ID_INTEL_G45_HB),

	ID(PCI_DEVICE_ID_INTEL_G41_HB),

	ID(PCI_DEVICE_ID_INTEL_B43_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),

	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),

	{ }

};

drivers/gpu/drm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ drm-y := drm_auth.o drm_bufs.o drm_cache.o \ 


drm-$(CONFIG_COMPAT) += drm_ioc32.o



drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o

drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_i2c_helper.o



obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o

drivers/gpu/drm/drm_crtc.c

+175 −1
Original line number Diff line number Diff line
@@ -125,6 +125,15 @@ static struct drm_prop_enum_list drm_tv_subconnector_enum_list[] = 
DRM_ENUM_NAME_FN(drm_get_tv_subconnector_name,

		 drm_tv_subconnector_enum_list)



static struct drm_prop_enum_list drm_dirty_info_enum_list[] = {

	{ DRM_MODE_DIRTY_OFF,      "Off"      },

	{ DRM_MODE_DIRTY_ON,       "On"       },

	{ DRM_MODE_DIRTY_ANNOTATE, "Annotate" },

};



DRM_ENUM_NAME_FN(drm_get_dirty_info_name,

		 drm_dirty_info_enum_list)



struct drm_conn_prop_enum_list {

	int type;

	char *name;
@@ -247,7 +256,8 @@ static void drm_mode_object_put(struct drm_device *dev, 
	mutex_unlock(&dev->mode_config.idr_mutex);

}



void *drm_mode_object_find(struct drm_device *dev, uint32_t id, uint32_t type)

struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,

		uint32_t id, uint32_t type)

{

	struct drm_mode_object *obj = NULL;
@@ -801,6 +811,36 @@ int drm_mode_create_dithering_property(struct drm_device *dev) 
}

EXPORT_SYMBOL(drm_mode_create_dithering_property);



/**

 * drm_mode_create_dirty_property - create dirty property

 * @dev: DRM device

 *

 * Called by a driver the first time it's needed, must be attached to desired

 * connectors.

 */

int drm_mode_create_dirty_info_property(struct drm_device *dev)

{

	struct drm_property *dirty_info;

	int i;



	if (dev->mode_config.dirty_info_property)

		return 0;



	dirty_info =

		drm_property_create(dev, DRM_MODE_PROP_ENUM |

				    DRM_MODE_PROP_IMMUTABLE,

				    "dirty",

				    ARRAY_SIZE(drm_dirty_info_enum_list));

	for (i = 0; i < ARRAY_SIZE(drm_dirty_info_enum_list); i++)

		drm_property_add_enum(dirty_info, i,

				      drm_dirty_info_enum_list[i].type,

				      drm_dirty_info_enum_list[i].name);

	dev->mode_config.dirty_info_property = dirty_info;



	return 0;

}

EXPORT_SYMBOL(drm_mode_create_dirty_info_property);



/**

 * drm_mode_config_init - initialize DRM mode_configuration structure

 * @dev: DRM device
@@ -1753,6 +1793,71 @@ out: 
	return ret;

}



int drm_mode_dirtyfb_ioctl(struct drm_device *dev,

			   void *data, struct drm_file *file_priv)

{

	struct drm_clip_rect __user *clips_ptr;

	struct drm_clip_rect *clips = NULL;

	struct drm_mode_fb_dirty_cmd *r = data;

	struct drm_mode_object *obj;

	struct drm_framebuffer *fb;

	unsigned flags;

	int num_clips;

	int ret = 0;



	mutex_lock(&dev->mode_config.mutex);

	obj = drm_mode_object_find(dev, r->fb_id, DRM_MODE_OBJECT_FB);

	if (!obj) {

		DRM_ERROR("invalid framebuffer id\n");

		ret = -EINVAL;

		goto out_err1;

	}

	fb = obj_to_fb(obj);



	num_clips = r->num_clips;

	clips_ptr = (struct drm_clip_rect *)(unsigned long)r->clips_ptr;



	if (!num_clips != !clips_ptr) {

		ret = -EINVAL;

		goto out_err1;

	}



	flags = DRM_MODE_FB_DIRTY_FLAGS & r->flags;



	/* If userspace annotates copy, clips must come in pairs */

	if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY && (num_clips % 2)) {

		ret = -EINVAL;

		goto out_err1;

	}



	if (num_clips && clips_ptr) {

		clips = kzalloc(num_clips * sizeof(*clips), GFP_KERNEL);

		if (!clips) {

			ret = -ENOMEM;

			goto out_err1;

		}



		ret = copy_from_user(clips, clips_ptr,

				     num_clips * sizeof(*clips));

		if (ret)

			goto out_err2;

	}



	if (fb->funcs->dirty) {

		ret = fb->funcs->dirty(fb, flags, r->color, clips, num_clips);

	} else {

		ret = -ENOSYS;

		goto out_err2;

	}



out_err2:

	kfree(clips);

out_err1:

	mutex_unlock(&dev->mode_config.mutex);

	return ret;

}





/**

 * drm_fb_release - remove and free the FBs on this file

 * @filp: file * from the ioctl
@@ -2478,3 +2583,72 @@ out: 
	mutex_unlock(&dev->mode_config.mutex);

	return ret;

}



int drm_mode_page_flip_ioctl(struct drm_device *dev,

			     void *data, struct drm_file *file_priv)

{

	struct drm_mode_crtc_page_flip *page_flip = data;

	struct drm_mode_object *obj;

	struct drm_crtc *crtc;

	struct drm_framebuffer *fb;

	struct drm_pending_vblank_event *e = NULL;

	unsigned long flags;

	int ret = -EINVAL;



	if (page_flip->flags & ~DRM_MODE_PAGE_FLIP_FLAGS ||

	    page_flip->reserved != 0)

		return -EINVAL;



	mutex_lock(&dev->mode_config.mutex);

	obj = drm_mode_object_find(dev, page_flip->crtc_id, DRM_MODE_OBJECT_CRTC);

	if (!obj)

		goto out;

	crtc = obj_to_crtc(obj);



	if (crtc->funcs->page_flip == NULL)

		goto out;



	obj = drm_mode_object_find(dev, page_flip->fb_id, DRM_MODE_OBJECT_FB);

	if (!obj)

		goto out;

	fb = obj_to_fb(obj);



	if (page_flip->flags & DRM_MODE_PAGE_FLIP_EVENT) {

		ret = -ENOMEM;

		spin_lock_irqsave(&dev->event_lock, flags);

		if (file_priv->event_space < sizeof e->event) {

			spin_unlock_irqrestore(&dev->event_lock, flags);

			goto out;

		}

		file_priv->event_space -= sizeof e->event;

		spin_unlock_irqrestore(&dev->event_lock, flags);



		e = kzalloc(sizeof *e, GFP_KERNEL);

		if (e == NULL) {

			spin_lock_irqsave(&dev->event_lock, flags);

			file_priv->event_space += sizeof e->event;

			spin_unlock_irqrestore(&dev->event_lock, flags);

			goto out;

		}



		e->event.base.type = DRM_EVENT_FLIP_COMPLETE;

		e->event.base.length = sizeof e->event;

		e->event.user_data = page_flip->user_data;

		e->base.event = &e->event.base;

		e->base.file_priv = file_priv;

		e->base.destroy =

			(void (*) (struct drm_pending_event *)) kfree;

	}



	ret = crtc->funcs->page_flip(crtc, fb, e);

	if (ret) {

		spin_lock_irqsave(&dev->event_lock, flags);

		file_priv->event_space += sizeof e->event;

		spin_unlock_irqrestore(&dev->event_lock, flags);

		kfree(e);

	}



out:

	mutex_unlock(&dev->mode_config.mutex);

	return ret;

}

drivers/gpu/drm/drm_crtc_helper.c

+4 −1
Original line number Diff line number Diff line
@@ -109,7 +109,7 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, 


	count = (*connector_funcs->get_modes)(connector);

	if (!count) {

		count = drm_add_modes_noedid(connector, 800, 600);

		count = drm_add_modes_noedid(connector, 1024, 768);

		if (!count)

			return 0;

	}
@@ -1020,6 +1020,9 @@ bool drm_helper_initial_config(struct drm_device *dev) 
{

	int count = 0;



	/* disable all the possible outputs/crtcs before entering KMS mode */

	drm_helper_disable_unused_functions(dev);



	drm_fb_helper_parse_command_line(dev);



	count = drm_helper_probe_connector_modes(dev,

drivers/gpu/drm/i915/intel_dp_i2c.c→drivers/gpu/drm/drm_dp_i2c_helper.c

+6 −70
Original line number Diff line number Diff line
@@ -28,85 +28,21 @@ 
#include <linux/errno.h>

#include <linux/sched.h>

#include <linux/i2c.h>

#include "intel_dp.h"

#include "drm_dp_helper.h"

#include "drmP.h"



/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */



#define MODE_I2C_START	1

#define MODE_I2C_WRITE	2

#define MODE_I2C_READ	4

#define MODE_I2C_STOP	8



static int

i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,

			    uint8_t write_byte, uint8_t *read_byte)

{

	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;

	uint16_t address = algo_data->address;

	uint8_t msg[5];

	uint8_t reply[2];

	int msg_bytes;

	int reply_bytes;

	int ret;

	

	/* Set up the command byte */

	if (mode & MODE_I2C_READ)

		msg[0] = AUX_I2C_READ << 4;

	else

		msg[0] = AUX_I2C_WRITE << 4;



	if (!(mode & MODE_I2C_STOP))

		msg[0] |= AUX_I2C_MOT << 4;



	msg[1] = address >> 8;

	msg[2] = address;



	switch (mode) {

	case MODE_I2C_WRITE:

		msg[3] = 0;

		msg[4] = write_byte;

		msg_bytes = 5;

		reply_bytes = 1;

		break;

	case MODE_I2C_READ:

		msg[3] = 0;

		msg_bytes = 4;

		reply_bytes = 2;

		break;

	default:

		msg_bytes = 3;

		reply_bytes = 1;

		break;

	}



	for (;;) {

		ret = (*algo_data->aux_ch)(adapter,

					   msg, msg_bytes,

					   reply, reply_bytes);

		if (ret < 0) {

			DRM_DEBUG("aux_ch failed %d\n", ret);

	ret = (*algo_data->aux_ch)(adapter, mode,

				   write_byte, read_byte);

	return ret;

}

		switch (reply[0] & AUX_I2C_REPLY_MASK) {

		case AUX_I2C_REPLY_ACK:

			if (mode == MODE_I2C_READ) {

				*read_byte = reply[1];

			}

			return reply_bytes - 1;

		case AUX_I2C_REPLY_NACK:

			DRM_DEBUG("aux_ch nack\n");

			return -EREMOTEIO;

		case AUX_I2C_REPLY_DEFER:

			DRM_DEBUG("aux_ch defer\n");

			udelay(100);

			break;

		default:

			DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]);

			return -EREMOTEIO;

		}

	}

}



/*

 * I2C over AUX CH
@@ -224,7 +160,7 @@ i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter, 
	if (ret >= 0)

		ret = num;

	i2c_algo_dp_aux_stop(adapter, reading);

	DRM_DEBUG("dp_aux_xfer return %d\n", ret);

	DRM_DEBUG_KMS("dp_aux_xfer return %d\n", ret);

	return ret;

}

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