Commit 3ee50dcb authored Aug 12, 2017 by Paul Burton Committed by Ralf Baechle Sep 04, 2017

irqchip: mips-gic: Remove GIC_CPU_INT* macros



The GIC_CPU_INT* macros are never used. Remove the dead code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17038/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent ba9cc435

include/linux/irqchip/mips-gic.h

+0 −8

Original line number	Diff line number	Diff line
		@@ -21,14 +21,6 @@
		#define GIC_UMV_SH_COUNTER_31_00_OFS 0x0000
		#define GIC_UMV_SH_COUNTER_63_32_OFS 0x0004

		/* GIC nomenclature for Core Interrupt Pins. */
		#define GIC_CPU_INT0 0 /* Core Interrupt 2 */
		#define GIC_CPU_INT1 1 /* . */
		#define GIC_CPU_INT2 2 /* . */
		#define GIC_CPU_INT3 3 /* . */
		#define GIC_CPU_INT4 4 /* . */
		#define GIC_CPU_INT5 5 /* Core Interrupt 7 */

		/* Add 2 to convert GIC CPU pin to core interrupt */
		#define GIC_CPU_PIN_OFFSET 2

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