Commit 3e954d96 authored Jan 13, 2020 by Clément Péron Committed by Thierry Reding Jan 20, 2020

pwm: sun4i: Move pwm_calculate() out of spin_lock()



pwm_calculate() calls clk_get_rate() while holding a spin_lock().

This create an issue as clk_get_rate() may sleep.

Move pwm_calculate() out of this spin_lock().

Fixes: c32c5c50 ("pwm: sun4i: Switch to atomic PWM")
Reported-by: Alexander Finger <alex.mobigo@gmail.com>
Sugested-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Alexander Finger <alex.mobigo@gmail.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>

parent 9f2919e9

drivers/pwm/pwm-sun4i.c

+3 −4

Original line number	Diff line number	Diff line
		@@ -248,19 +248,18 @@ static int sun4i_pwm_apply(struct pwm_chip chip, struct pwm_device pwm,
		}
		}

		spin_lock(&sun4i_pwm->ctrl_lock);
		ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);

		ret = sun4i_pwm_calculate(sun4i_pwm, state, &duty, &period, &prescaler,
		&bypass);
		if (ret) {
		dev_err(chip->dev, "period exceeds the maximum value\n");
		spin_unlock(&sun4i_pwm->ctrl_lock);
		if (!cstate.enabled)
		clk_disable_unprepare(sun4i_pwm->clk);
		return ret;
		}

		spin_lock(&sun4i_pwm->ctrl_lock);
		ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);

		if (sun4i_pwm->data->has_direct_mod_clk_output) {
		if (bypass) {
		ctrl \|= BIT_CH(PWM_BYPASS, pwm->hwpwm);

Admin message