Unverified Commit 3e84cdd4 authored by Tudor Ambarus's avatar Tudor Ambarus Committed by Mark Brown
Browse files

spi: Fix SPI NOR and SPI NAND acronyms



The industry refers to these flash types as "SPI NOR" and
"SPI NAND". Be consistent and use the same acronyms.

Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200716051144.568606-1-tudor.ambarus@microchip.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b780c3f3
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+5 −5
Original line number Diff line number Diff line
@@ -169,7 +169,7 @@ config SPI_BCM_QSPI
	help
	  Enables support for the Broadcom SPI flash and MSPI controller.
	  Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
	  based platforms. This driver works for both SPI master for spi-nor
	  based platforms. This driver works for both SPI master for SPI NOR
	  flash device as well as MSPI device.

config SPI_BITBANG
@@ -311,11 +311,11 @@ config SPI_FSL_QUADSPI
	  supports the high-level SPI memory interface.

config SPI_HISI_SFC_V3XX
	tristate "HiSilicon SPI-NOR Flash Controller for Hi16XX chipsets"
	tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets"
	depends on (ARM64 && ACPI) || COMPILE_TEST
	depends on HAS_IOMEM
	help
	  This enables support for HiSilicon v3xx SPI-NOR flash controller
	  This enables support for HiSilicon v3xx SPI NOR flash controller
	  found in hi16xx chipsets.

config SPI_NXP_FLEXSPI
@@ -477,9 +477,9 @@ config SPI_MTK_NOR
	depends on ARCH_MEDIATEK || COMPILE_TEST
	help
	  This enables support for SPI NOR controller found on MediaTek
	  ARM SoCs. This is a controller specifically for SPI-NOR flash.
	  ARM SoCs. This is a controller specifically for SPI NOR flash.
	  It can perform generic SPI transfers up to 6 bytes via generic
	  SPI interface as well as several SPI-NOR specific instructions
	  SPI interface as well as several SPI NOR specific instructions
	  via SPI MEM interface.

config SPI_NPCM_FIU
+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@
 *     Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
 *     Suresh Gupta <suresh.gupta@nxp.com>
 *
 * Based on the original fsl-quadspi.c spi-nor driver:
 * Based on the original fsl-quadspi.c SPI NOR driver:
 * Author: Freescale Semiconductor, Inc.
 *
 */
+1 −1
Original line number Diff line number Diff line
@@ -708,7 +708,7 @@ static int orion_spi_probe(struct platform_device *pdev)
		/*
		 * Only map one page for direct access. This is enough for the
		 * simple TX transfer which only writes to the first word.
		 * This needs to get extended for the direct SPI-NOR / SPI-NAND
		 * This needs to get extended for the direct SPI NOR / SPI NAND
		 * support, once this gets implemented.
		 */
		dir_acc = &spi->child[cs].direct_access;