Commit 3e416992 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by David S. Miller
Browse files

sh_eth: add sh_eth_cpu_data::edtrr_trns value 



sh_eth_get_edtrr_trns() returns the value to be written to EDTRR in order
to start TX DMA -- this value is different between the GEther-like and
the other controllers. We can replace this function (and thus get rid of
the calls to sh_eth_is_{gether|rz_fast_ether}() by it) with a new field
'edtrr_trns' in the 'struct sh_eth_cpu_data'.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4ceedeb1

drivers/net/ethernet/renesas/sh_eth.c

+15 −12
Original line number Original line Diff line number Diff line
@@ -584,6 +584,7 @@ static struct sh_eth_cpu_data r7s72100_data = { 




	.register_type	= SH_ETH_REG_FAST_RZ,

	.register_type	= SH_ETH_REG_FAST_RZ,





	.edtrr_trns	= EDTRR_TRNS_GETHER,

	.ecsr_value	= ECSR_ICD,

	.ecsr_value	= ECSR_ICD,

	.ecsipr_value	= ECSIPR_ICDIP,

	.ecsipr_value	= ECSIPR_ICDIP,

	.eesipr_value	= EESIPR_TWB1IP | EESIPR_TWBIP | EESIPR_TC1IP |

	.eesipr_value	= EESIPR_TWB1IP | EESIPR_TWBIP | EESIPR_TC1IP |
@@ -631,6 +632,7 @@ static struct sh_eth_cpu_data r8a7740_data = { 




	.register_type	= SH_ETH_REG_GIGABIT,

	.register_type	= SH_ETH_REG_GIGABIT,





	.edtrr_trns	= EDTRR_TRNS_GETHER,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
@@ -687,6 +689,7 @@ static struct sh_eth_cpu_data rcar_gen1_data = { 




	.register_type	= SH_ETH_REG_FAST_RCAR,

	.register_type	= SH_ETH_REG_FAST_RCAR,





	.edtrr_trns	= EDTRR_TRNS_ETHER,

	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,

	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,

	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,

	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |
@@ -716,6 +719,7 @@ static struct sh_eth_cpu_data rcar_gen2_data = { 




	.register_type	= SH_ETH_REG_FAST_RCAR,

	.register_type	= SH_ETH_REG_FAST_RCAR,





	.edtrr_trns	= EDTRR_TRNS_ETHER,

	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | ECSR_MPD,

	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP |

	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP |

			  ECSIPR_MPDIP,

			  ECSIPR_MPDIP,
@@ -765,6 +769,7 @@ static struct sh_eth_cpu_data sh7724_data = { 




	.register_type	= SH_ETH_REG_FAST_SH4,

	.register_type	= SH_ETH_REG_FAST_SH4,





	.edtrr_trns	= EDTRR_TRNS_ETHER,

	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,

	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,

	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,

	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP |
@@ -809,6 +814,7 @@ static struct sh_eth_cpu_data sh7757_data = { 




	.register_type	= SH_ETH_REG_FAST_SH4,

	.register_type	= SH_ETH_REG_FAST_SH4,





	.edtrr_trns	= EDTRR_TRNS_ETHER,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |

			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |

			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |

			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
@@ -884,6 +890,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = { 




	.register_type	= SH_ETH_REG_GIGABIT,

	.register_type	= SH_ETH_REG_GIGABIT,





	.edtrr_trns	= EDTRR_TRNS_GETHER,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
@@ -925,6 +932,7 @@ static struct sh_eth_cpu_data sh7734_data = { 




	.register_type	= SH_ETH_REG_GIGABIT,

	.register_type	= SH_ETH_REG_GIGABIT,





	.edtrr_trns	= EDTRR_TRNS_GETHER,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
@@ -963,6 +971,7 @@ static struct sh_eth_cpu_data sh7763_data = { 




	.register_type	= SH_ETH_REG_GIGABIT,

	.register_type	= SH_ETH_REG_GIGABIT,





	.edtrr_trns	= EDTRR_TRNS_GETHER,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |
@@ -995,6 +1004,7 @@ static struct sh_eth_cpu_data sh7619_data = { 




	.register_type	= SH_ETH_REG_FAST_SH3_SH2,

	.register_type	= SH_ETH_REG_FAST_SH3_SH2,





	.edtrr_trns	= EDTRR_TRNS_ETHER,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |

			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |

			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |

			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
@@ -1015,6 +1025,7 @@ static struct sh_eth_cpu_data sh771x_data = { 




	.register_type	= SH_ETH_REG_FAST_SH3_SH2,

	.register_type	= SH_ETH_REG_FAST_SH3_SH2,





	.edtrr_trns	= EDTRR_TRNS_ETHER,

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

	.eesipr_value	= EESIPR_RFCOFIP | EESIPR_ECIIP |

			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |

			  EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP |

			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |

			  EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP |
@@ -1094,14 +1105,6 @@ static void read_mac_address(struct net_device *ndev, unsigned char *mac) 
	}

	}

}

}





static u32 sh_eth_get_edtrr_trns(struct sh_eth_private *mdp)

{

	if (sh_eth_is_gether(mdp) || sh_eth_is_rz_fast_ether(mdp))

		return EDTRR_TRNS_GETHER;

	else

		return EDTRR_TRNS_ETHER;

}



struct bb_info {

struct bb_info {

	void (*set_gate)(void *addr);

	void (*set_gate)(void *addr);

	struct mdiobb_ctrl ctrl;

	struct mdiobb_ctrl ctrl;
@@ -1741,9 +1744,9 @@ static void sh_eth_error(struct net_device *ndev, u32 intr_status) 
		sh_eth_tx_free(ndev, true);

		sh_eth_tx_free(ndev, true);





		/* SH7712 BUG */

		/* SH7712 BUG */

		if (edtrr ^ sh_eth_get_edtrr_trns(mdp)) {

		if (edtrr ^ mdp->cd->edtrr_trns) {

			/* tx dma start */

			/* tx dma start */

			sh_eth_write(ndev, sh_eth_get_edtrr_trns(mdp), EDTRR);

			sh_eth_write(ndev, mdp->cd->edtrr_trns, EDTRR);

		}

		}

		/* wakeup */

		/* wakeup */

		netif_wake_queue(ndev);

		netif_wake_queue(ndev);
@@ -2502,8 +2505,8 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev) 




	mdp->cur_tx++;

	mdp->cur_tx++;





	if (!(sh_eth_read(ndev, EDTRR) & sh_eth_get_edtrr_trns(mdp)))

	if (!(sh_eth_read(ndev, EDTRR) & mdp->cd->edtrr_trns))

		sh_eth_write(ndev, sh_eth_get_edtrr_trns(mdp), EDTRR);

		sh_eth_write(ndev, mdp->cd->edtrr_trns, EDTRR);





	return NETDEV_TX_OK;

	return NETDEV_TX_OK;

}

}

drivers/net/ethernet/renesas/sh_eth.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -479,6 +479,7 @@ struct sh_eth_cpu_data { 




	/* mandatory initialize value */

	/* mandatory initialize value */

	int register_type;

	int register_type;

	u32 edtrr_trns;

	u32 eesipr_value;

	u32 eesipr_value;





	/* optional initialize value */

	/* optional initialize value */

CRA Git | Maintained and supported by SUSTech CRA and CCSE