Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 (3e3b3916) · Commits · 戴 / test

arch/x86/kernel/io_apic_32.c

+12 −4

Original line number	Diff line number	Diff line
		@@ -1882,13 +1882,16 @@ __setup("no_timer_check", notimercheck);
		static int __init timer_irq_works(void)
		{
		unsigned long t1 = jiffies;
		unsigned long flags;

		if (no_timer_check)
		return 1;

		local_save_flags(flags);
		local_irq_enable();
		/* Let ten ticks pass... */
		mdelay((10 * 1000) / HZ);
		local_irq_restore(flags);

		/*
		* Expect a few ticks at least, to be sure some possible
		@@ -2167,6 +2170,9 @@ static inline void __init check_timer(void)
		int apic1, pin1, apic2, pin2;
		int vector;
		unsigned int ver;
		unsigned long flags;

		local_irq_save(flags);

		ver = apic_read(APIC_LVR);
		ver = GET_APIC_VERSION(ver);
		@@ -2219,7 +2225,7 @@ static inline void __init check_timer(void)
		}
		if (disable_timer_pin_1 > 0)
		clear_IO_APIC_pin(0, pin1);
		return;
		goto out;
		}
		clear_IO_APIC_pin(apic1, pin1);
		printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to "
		@@ -2242,7 +2248,7 @@ static inline void __init check_timer(void)
		if (nmi_watchdog == NMI_IO_APIC) {
		setup_nmi();
		}
		return;
		goto out;
		}
		/*
		* Cleanup, just in case ...
		@@ -2266,7 +2272,7 @@ static inline void __init check_timer(void)

		if (timer_irq_works()) {
		printk(" works.\n");
		return;
		goto out;
		}
		apic_write_around(APIC_LVT0, APIC_LVT_MASKED \| APIC_DM_FIXED \| vector);
		printk(" failed.\n");
		@@ -2282,11 +2288,13 @@ static inline void __init check_timer(void)

		if (timer_irq_works()) {
		printk(" works.\n");
		return;
		goto out;
		}
		printk(" failed :(.\n");
		panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a "
		"report. Then try booting with the 'noapic' option");
		out:
		local_irq_restore(flags);
		}

		/*

arch/x86/kernel/io_apic_64.c

+12 −4

Original line number	Diff line number	Diff line
		@@ -1281,10 +1281,13 @@ void disable_IO_APIC(void)
		static int __init timer_irq_works(void)
		{
		unsigned long t1 = jiffies;
		unsigned long flags;

		local_save_flags(flags);
		local_irq_enable();
		/* Let ten ticks pass... */
		mdelay((10 * 1000) / HZ);
		local_irq_restore(flags);

		/*
		* Expect a few ticks at least, to be sure some possible
		@@ -1655,6 +1658,9 @@ static inline void check_timer(void)
		{
		struct irq_cfg *cfg = irq_cfg + 0;
		int apic1, pin1, apic2, pin2;
		unsigned long flags;

		local_irq_save(flags);

		/*
		* get/set the timer IRQ vector:
		@@ -1696,7 +1702,7 @@ static inline void check_timer(void)
		}
		if (disable_timer_pin_1 > 0)
		clear_IO_APIC_pin(0, pin1);
		return;
		goto out;
		}
		clear_IO_APIC_pin(apic1, pin1);
		apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not "
		@@ -1718,7 +1724,7 @@ static inline void check_timer(void)
		if (nmi_watchdog == NMI_IO_APIC) {
		setup_nmi();
		}
		return;
		goto out;
		}
		/*
		* Cleanup, just in case ...
		@@ -1741,7 +1747,7 @@ static inline void check_timer(void)

		if (timer_irq_works()) {
		apic_printk(APIC_VERBOSE," works.\n");
		return;
		goto out;
		}
		apic_write(APIC_LVT0, APIC_LVT_MASKED \| APIC_DM_FIXED \| cfg->vector);
		apic_printk(APIC_VERBOSE," failed.\n");
		@@ -1756,10 +1762,12 @@ static inline void check_timer(void)

		if (timer_irq_works()) {
		apic_printk(APIC_VERBOSE," works.\n");
		return;
		goto out;
		}
		apic_printk(APIC_VERBOSE," failed :(.\n");
		panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n");
		out:
		local_irq_restore(flags);
		}

		static int __init notimercheck(char *s)

arch/x86/kernel/kprobes_32.c

+1 −3

Original line number	Diff line number	Diff line
		@@ -727,9 +727,7 @@ int __kprobes longjmp_break_handler(struct kprobe p, struct pt_regs regs)

		if ((addr > (u8 ) jprobe_return) && (addr < (u8 ) jprobe_return_end)) {
		if (&regs->esp != kcb->jprobe_saved_esp) {
		struct pt_regs *saved_regs =
		container_of(kcb->jprobe_saved_esp,
		struct pt_regs, esp);
		struct pt_regs *saved_regs = &kcb->jprobe_saved_regs;
		printk("current esp %p does not match saved esp %p\n",
		&regs->esp, kcb->jprobe_saved_esp);
		printk("Saved registers for jprobe %p\n", jp);

arch/x86/kernel/kprobes_64.c

+20 −27

Original line number	Diff line number	Diff line
		@@ -485,7 +485,6 @@ static void __kprobes resume_execution(struct kprobe *p,
		struct pt_regs regs, struct kprobe_ctlblk kcb)
		{
		unsigned long tos = (unsigned long )regs->rsp;
		unsigned long next_rip = 0;
		unsigned long copy_rip = (unsigned long)p->ainsn.insn;
		unsigned long orig_rip = (unsigned long)p->addr;
		kprobe_opcode_t *insn = p->ainsn.insn;
		@@ -494,46 +493,42 @@ static void __kprobes resume_execution(struct kprobe *p,
		if (insn >= 0x40 && insn <= 0x4f)
		insn++;

		regs->eflags &= ~TF_MASK;
		switch (*insn) {
		case 0x9c: /* pushfl */
		*tos &= ~(TF_MASK \| IF_MASK);
		*tos \|= kcb->kprobe_old_rflags;
		break;
		case 0xc3: /* ret/lret */
		case 0xcb:
		case 0xc2:
		case 0xc2: /* iret/ret/lret */
		case 0xc3:
		case 0xca:
		regs->eflags &= ~TF_MASK;
		/* rip is already adjusted, no more changes required*/
		return;
		case 0xcb:
		case 0xcf:
		case 0xea: /* jmp absolute -- ip is correct */
		/* ip is already adjusted, no more changes required */
		goto no_change;
		case 0xe8: /* call relative - Fix return addr */
		tos = orig_rip + (tos - copy_rip);
		break;
		case 0xff:
		if ((insn[1] & 0x30) == 0x10) {
		/* call absolute, indirect */
		/* Fix return addr; rip is correct. */
		next_rip = regs->rip;
		/* Fix return addr; ip is correct. */
		tos = orig_rip + (tos - copy_rip);
		goto no_change;
		} else if (((insn[1] & 0x31) == 0x20) \|\| /* jmp near, absolute indirect */
		((insn[1] & 0x31) == 0x21)) { /* jmp far, absolute indirect */
		/* rip is correct. */
		next_rip = regs->rip;
		/* ip is correct. */
		goto no_change;
		}
		break;
		case 0xea: /* jmp absolute -- rip is correct */
		next_rip = regs->rip;
		break;
		default:
		break;
		}

		regs->eflags &= ~TF_MASK;
		if (next_rip) {
		regs->rip = next_rip;
		} else {
		regs->rip = orig_rip + (regs->rip - copy_rip);
		}
		no_change:

		return;
		}

		int __kprobes post_kprobe_handler(struct pt_regs *regs)
		@@ -716,10 +711,8 @@ int __kprobes longjmp_break_handler(struct kprobe p, struct pt_regs regs)
		struct jprobe *jp = container_of(p, struct jprobe, kp);

		if ((addr > (u8 ) jprobe_return) && (addr < (u8 ) jprobe_return_end)) {
		if ((long *)regs->rsp != kcb->jprobe_saved_rsp) {
		struct pt_regs *saved_regs =
		container_of(kcb->jprobe_saved_rsp,
		struct pt_regs, rsp);
		if ((unsigned long *)regs->rsp != kcb->jprobe_saved_rsp) {
		struct pt_regs *saved_regs = &kcb->jprobe_saved_regs;
		printk("current rsp %p does not match saved rsp %p\n",
		(long *)regs->rsp, kcb->jprobe_saved_rsp);
		printk("Saved registers for jprobe %p\n", jp);

arch/x86/oprofile/op_model_athlon.c

+16 −6

Original line number	Diff line number	Diff line
		/**
		* @file op_model_athlon.h
		* athlon / K7 model-specific MSR operations
		* athlon / K7 / K8 / Family 10h model-specific MSR operations
		*
		* @remark Copyright 2002 OProfile authors
		* @remark Read the file COPYING
		@@ -31,12 +31,16 @@
		#define CTRL_WRITE(l,h,msrs,c) do {wrmsr(msrs->controls[(c)].addr, (l), (h));} while (0)
		#define CTRL_SET_ACTIVE(n) (n \|= (1<<22))
		#define CTRL_SET_INACTIVE(n) (n &= ~(1<<22))
		#define CTRL_CLEAR(x) (x &= (1<<21))
		#define CTRL_CLEAR_LO(x) (x &= (1<<21))
		#define CTRL_CLEAR_HI(x) (x &= 0xfffffcf0)
		#define CTRL_SET_ENABLE(val) (val \|= 1<<20)
		#define CTRL_SET_USR(val,u) (val \|= ((u & 1) << 16))
		#define CTRL_SET_KERN(val,k) (val \|= ((k & 1) << 17))
		#define CTRL_SET_UM(val, m) (val \|= (m << 8))
		#define CTRL_SET_EVENT(val, e) (val \|= e)
		#define CTRL_SET_EVENT_LOW(val, e) (val \|= (e & 0xff))
		#define CTRL_SET_EVENT_HIGH(val, e) (val \|= ((e >> 8) & 0xf))
		#define CTRL_SET_HOST_ONLY(val, h) (val \|= ((h & 1) << 9))
		#define CTRL_SET_GUEST_ONLY(val, h) (val \|= ((h & 1) << 8))

		static unsigned long reset_value[NUM_COUNTERS];

		@@ -70,7 +74,8 @@ static void athlon_setup_ctrs(struct op_msrs const * const msrs)
		if (unlikely(!CTRL_IS_RESERVED(msrs,i)))
		continue;
		CTRL_READ(low, high, msrs, i);
		CTRL_CLEAR(low);
		CTRL_CLEAR_LO(low);
		CTRL_CLEAR_HI(high);
		CTRL_WRITE(low, high, msrs, i);
		}

		@@ -89,12 +94,17 @@ static void athlon_setup_ctrs(struct op_msrs const * const msrs)
		CTR_WRITE(counter_config[i].count, msrs, i);

		CTRL_READ(low, high, msrs, i);
		CTRL_CLEAR(low);
		CTRL_CLEAR_LO(low);
		CTRL_CLEAR_HI(high);
		CTRL_SET_ENABLE(low);
		CTRL_SET_USR(low, counter_config[i].user);
		CTRL_SET_KERN(low, counter_config[i].kernel);
		CTRL_SET_UM(low, counter_config[i].unit_mask);
		CTRL_SET_EVENT(low, counter_config[i].event);
		CTRL_SET_EVENT_LOW(low, counter_config[i].event);
		CTRL_SET_EVENT_HIGH(high, counter_config[i].event);
		CTRL_SET_HOST_ONLY(high, 0);
		CTRL_SET_GUEST_ONLY(high, 0);

		CTRL_WRITE(low, high, msrs, i);
		} else {
		reset_value[i] = 0;

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