ARM: dts: r8a7792: move timer node out of bus (3da25909) · Commits · 戴 / test

The timer node does not have any register properties and thus shouldn't be placed on the bus. This problem is flagged by the compiler as follows: $ make dtbs W=1 ... DTC arch/arm/boot/dts/r8a7792-wheat.dtb arch/arm/boot/dts/r8a7792-blanche.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property arch/arm/boot/dts/r8a7792-wheat.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property Signed-off-by:

Simon Horman <horms+renesas@verge.net.au> Reviewed-by:

Geert Uytterhoeven <geert+renesas@glider.be>

arch/arm/boot/dts/r8a7792.dtsi

+8 −12

Original line number	Diff line number	Diff line
		@@ -137,18 +137,6 @@
		resets = <&cpg 407>;
		};

		timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) \|
		IRQ_TYPE_LEVEL_LOW)>,
		<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) \|
		IRQ_TYPE_LEVEL_LOW)>,
		<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) \|
		IRQ_TYPE_LEVEL_LOW)>,
		<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) \|
		IRQ_TYPE_LEVEL_LOW)>;
		};

		rst: reset-controller@e6160000 {
		compatible = "renesas,r8a7792-rst";
		reg = <0 0xe6160000 0 0x0100>;
		@@ -856,4 +844,12 @@
		#power-domain-cells = <0>;
		};
		};

		timer {
		compatible = "arm,armv7-timer";
		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
		<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
		<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>,
		<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_LEVEL_LOW)>;
		};
		};

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