Commit 3d9bf07a authored Sep 23, 2018 by Martin Blumenstingl Committed by Jonathan Cameron Sep 29, 2018

iio: adc: meson-saradc: remove #define MESON_SAR_ADC_DELTA_10_TS_C_SHIFT

This define is of no use because the driver is avoiding shifting bits
by itself but using FIELD_GET/FIELD_PREP (which are using bit masks)
instead. There is already a MESON_SAR_ADC_DELTA_10_TS_C_MASK bit mask so
MESON_SAR_ADC_DELTA_10_TS_C_SHIFT was redundant.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

parent 5851b499

drivers/iio/adc/meson_saradc.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -148,7 +148,6 @@
		#define MESON_SAR_ADC_DELTA_10_TS_REVE1 BIT(26)
		#define MESON_SAR_ADC_DELTA_10_CHAN1_DELTA_VALUE_MASK GENMASK(25, 16)
		#define MESON_SAR_ADC_DELTA_10_TS_REVE0 BIT(15)
		#define MESON_SAR_ADC_DELTA_10_TS_C_SHIFT 11
		#define MESON_SAR_ADC_DELTA_10_TS_C_MASK GENMASK(14, 11)
		#define MESON_SAR_ADC_DELTA_10_TS_VBG_EN BIT(10)
		#define MESON_SAR_ADC_DELTA_10_CHAN0_DELTA_VALUE_MASK GENMASK(9, 0)

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