Commit 3d1e7aa8 authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Greg Kroah-Hartman
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misc: rtsx: Use pcie_capability_clear_and_set_word() for PCI_EXP_LNKCTL



Instead of using the driver-specific rtsx_pci_update_cfg_byte() to update
the PCIe Link Control Register, use pcie_capability_clear_and_set_word()
like the rest of the kernel does.  This makes it easier to maintain ASPM
across the PCI core and drivers.

Remove the now-unused rtsx_pci_update_cfg_byte() and ASPM_MASK_NEG
definitions.

No functional change intended.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20200521180545.1159896-5-helgaas@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9ae57704
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+3 −6
Original line number Diff line number Diff line
@@ -349,15 +349,12 @@ static int rtsx_base_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)

static void rts5249_set_aspm(struct rtsx_pcr *pcr, bool enable)
{
	u8 val = 0;

	if (pcr->aspm_enabled == enable)
		return;

	if (enable)
		val = pcr->aspm_en;
	rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
				 ASPM_MASK_NEG, val);
	pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
					   PCI_EXP_LNKCTL_ASPMC,
					   enable ? pcr->aspm_en : 0);

	pcr->aspm_enabled = enable;
}
+3 −6
Original line number Diff line number Diff line
@@ -572,15 +572,12 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)

static void rts5260_set_aspm(struct rtsx_pcr *pcr, bool enable)
{
	u8 val = 0;

	if (pcr->aspm_enabled == enable)
		return;

	if (enable)
		val = pcr->aspm_en;
	rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
				 ASPM_MASK_NEG, val);
	pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
					   PCI_EXP_LNKCTL_ASPMC,
					   enable ?  pcr->aspm : 0);

	pcr->aspm_enabled = enable;
}
+4 −10
Original line number Diff line number Diff line
@@ -518,28 +518,22 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)

static void rts5261_enable_aspm(struct rtsx_pcr *pcr, bool enable)
{
	u8 val = 0;

	if (pcr->aspm_enabled == enable)
		return;

	val = pcr->aspm_en;
	rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
				 ASPM_MASK_NEG, val);
	pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
					   PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en);
	pcr->aspm_enabled = enable;

}

static void rts5261_disable_aspm(struct rtsx_pcr *pcr, bool enable)
{
	u8 val = 0;

	if (pcr->aspm_enabled == enable)
		return;

	val = 0;
	rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
				 ASPM_MASK_NEG, val);
	pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
					   PCI_EXP_LNKCTL_ASPMC, 0);
	rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
	udelay(10);
	pcr->aspm_enabled = enable;
+4 −4
Original line number Diff line number Diff line
@@ -57,14 +57,14 @@ MODULE_DEVICE_TABLE(pci, rtsx_pci_ids);

static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr)
{
	rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
		ASPM_MASK_NEG, pcr->aspm_en);
	pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
					   PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en);
}

static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr)
{
	rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
		ASPM_MASK_NEG, 0);
	pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL,
					   PCI_EXP_LNKCTL_ASPMC, 0);
}

static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency)
+0 −1
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@
#define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF	0xAC
#define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF	0xF8
#define CMD_TIMEOUT_DEF		100
#define ASPM_MASK_NEG		0xFC
#define MASK_8_BIT_DEF		0xFF

#define SSC_CLOCK_STABLE_WAIT	130
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