Commit 3d1b28fd authored by Luca Coelho's avatar Luca Coelho
Browse files

iwlwifi: pcie: rename L0S_ENABLED bit to L0S_DISABLED



This bit has been misnamed since the initial implementation of the
driver.  The correct semantics is that setting this bit disables L0S
states, and we already clearly use it as such in the code.  Rename it
to avoid confusion.

Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent df2378ab
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+1 −1
Original line number Diff line number Diff line
@@ -379,7 +379,7 @@ enum {


/* CSR GIO */
#define CSR_GIO_REG_VAL_L0S_ENABLED	(0x00000002)
#define CSR_GIO_REG_VAL_L0S_DISABLED	(0x00000002)

/*
 * UCODE-DRIVER GP (general purpose) mailbox register 1
+2 −2
Original line number Diff line number Diff line
@@ -311,9 +311,9 @@ void iwl_pcie_apm_config(struct iwl_trans *trans)
	 */
	pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl);
	if (lctl & PCI_EXP_LNKCTL_ASPM_L1)
		iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
		iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_DISABLED);
	else
		iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
		iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_DISABLED);
	trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);

	pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_DEVCTL2, &cap);