Commit 3ceea6a1 authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Chris Wilson
Browse files

drm/i915: use intel_uncore for all forcewake get/put 



Now that the internal code all works on intel_uncore, flip the
external-facing interface.

v2: fix GVT.

Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-4-daniele.ceraolospurio@intel.com
parent f568eeee

drivers/gpu/drm/i915/gvt/mmio_context.c

+4 −4
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id) 
	if (ring_id == RCS0 && INTEL_GEN(dev_priv) >= 9)

		fw |= FORCEWAKE_RENDER;



	intel_uncore_forcewake_get(dev_priv, fw);

	intel_uncore_forcewake_get(&dev_priv->uncore, fw);



	I915_WRITE_FW(reg, 0x1);
@@ -365,7 +365,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id) 
	else

		vgpu_vreg_t(vgpu, reg) = 0;



	intel_uncore_forcewake_put(dev_priv, fw);

	intel_uncore_forcewake_put(&dev_priv->uncore, fw);



	gvt_dbg_core("invalidate TLB for ring %d\n", ring_id);

}
@@ -552,9 +552,9 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre, 
	 * performace for batch mmio read/write, so we need

	 * handle forcewake mannually.

	 */

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);

	switch_mmio(pre, next, ring_id);

	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);

}



/**

drivers/gpu/drm/i915/gvt/scheduler.c

+2 −2
Original line number Diff line number Diff line
@@ -988,7 +988,7 @@ static int workload_thread(void *priv) 
				workload->ring_id, workload);



		if (need_force_wake)

			intel_uncore_forcewake_get(gvt->dev_priv,

			intel_uncore_forcewake_get(&gvt->dev_priv->uncore,

					FORCEWAKE_ALL);



		ret = dispatch_workload(workload);
@@ -1010,7 +1010,7 @@ complete: 
		complete_current_workload(gvt, ring_id);



		if (need_force_wake)

			intel_uncore_forcewake_put(gvt->dev_priv,

			intel_uncore_forcewake_put(&gvt->dev_priv->uncore,

					FORCEWAKE_ALL);



		intel_runtime_pm_put_unchecked(gvt->dev_priv);

drivers/gpu/drm/i915/i915_debugfs.c

+6 −6
Original line number Diff line number Diff line
@@ -1094,7 +1094,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 
		}



		/* RPSTAT1 is in the GT power well */

		intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

		intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);



		reqf = I915_READ(GEN6_RPNSWREQ);

		if (INTEL_GEN(dev_priv) >= 9)
@@ -1122,7 +1122,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 
		cagf = intel_gpu_freq(dev_priv,

				      intel_get_cagf(dev_priv, rpstat));



		intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

		intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);



		if (INTEL_GEN(dev_priv) >= 11) {

			pm_ier = I915_READ(GEN11_GPM_WGBOXPERF_INTR_ENABLE);
@@ -2060,12 +2060,12 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) 
		u32 rpup, rpupei;

		u32 rpdown, rpdownei;



		intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

		intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);

		rpup = I915_READ_FW(GEN6_RP_CUR_UP) & GEN6_RP_EI_MASK;

		rpupei = I915_READ_FW(GEN6_RP_CUR_UP_EI) & GEN6_RP_EI_MASK;

		rpdown = I915_READ_FW(GEN6_RP_CUR_DOWN) & GEN6_RP_EI_MASK;

		rpdownei = I915_READ_FW(GEN6_RP_CUR_DOWN_EI) & GEN6_RP_EI_MASK;

		intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

		intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);



		seq_printf(m, "\nRPS Autotuning (current \"%s\" window):\n",

			   rps_power_to_str(rps->power.mode));
@@ -4251,7 +4251,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file) 
		return 0;



	file->private_data = (void *)(uintptr_t)intel_runtime_pm_get(i915);

	intel_uncore_forcewake_user_get(i915);

	intel_uncore_forcewake_user_get(&i915->uncore);



	return 0;

}
@@ -4263,7 +4263,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file) 
	if (INTEL_GEN(i915) < 6)

		return 0;



	intel_uncore_forcewake_user_put(i915);

	intel_uncore_forcewake_user_put(&i915->uncore);

	intel_runtime_pm_put(i915,

			     (intel_wakeref_t)(uintptr_t)file->private_data);

drivers/gpu/drm/i915/i915_gem.c

+10 −10
Original line number Diff line number Diff line
@@ -4318,7 +4318,7 @@ void i915_gem_sanitize(struct drm_i915_private *i915) 
	GEM_TRACE("\n");



	wakeref = intel_runtime_pm_get(i915);

	intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);



	/*

	 * As we have just resumed the machine and woken the device up from
@@ -4339,7 +4339,7 @@ void i915_gem_sanitize(struct drm_i915_private *i915) 
	 */

	intel_engines_sanitize(i915, false);



	intel_uncore_forcewake_put(i915, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);

	intel_runtime_pm_put(i915, wakeref);



	mutex_lock(&i915->drm.struct_mutex);
@@ -4438,7 +4438,7 @@ void i915_gem_resume(struct drm_i915_private *i915) 
	WARN_ON(i915->gt.awake);



	mutex_lock(&i915->drm.struct_mutex);

	intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);



	i915_gem_restore_gtt_mappings(i915);

	i915_gem_restore_fences(i915);
@@ -4460,7 +4460,7 @@ void i915_gem_resume(struct drm_i915_private *i915) 
		goto err_wedged;



out_unlock:

	intel_uncore_forcewake_put(i915, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);

	mutex_unlock(&i915->drm.struct_mutex);

	return;
@@ -4549,7 +4549,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) 
	dev_priv->gt.last_init_time = ktime_get();



	/* Double layer security blanket, see i915_gem_init() */

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);



	if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)

		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
@@ -4604,14 +4604,14 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) 
	if (ret)

		goto cleanup_uc;



	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);



	return 0;



cleanup_uc:

	intel_uc_fini_hw(dev_priv);

out:

	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);



	return ret;

}
@@ -4815,7 +4815,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) 
	 * just magically go away.

	 */

	mutex_lock(&dev_priv->drm.struct_mutex);

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);



	ret = i915_gem_init_ggtt(dev_priv);

	if (ret) {
@@ -4877,7 +4877,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) 
		goto err_init_hw;

	}



	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);

	mutex_unlock(&dev_priv->drm.struct_mutex);



	return 0;
@@ -4912,7 +4912,7 @@ err_scratch: 
	i915_gem_fini_scratch(dev_priv);

err_ggtt:

err_unlock:

	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);

	mutex_unlock(&dev_priv->drm.struct_mutex);



err_uc_misc:

drivers/gpu/drm/i915/i915_perf.c

+3 −3
Original line number Diff line number Diff line
@@ -1364,7 +1364,7 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) 


	free_oa_buffer(dev_priv);



	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);

	intel_runtime_pm_put(dev_priv, stream->wakeref);



	if (stream->ctx)
@@ -2093,7 +2093,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, 
	 *   references will effectively disable RC6.

	 */

	stream->wakeref = intel_runtime_pm_get(dev_priv);

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);



	ret = alloc_oa_buffer(dev_priv);

	if (ret)
@@ -2127,7 +2127,7 @@ err_lock: 
err_oa_buf_alloc:

	put_oa_config(dev_priv, stream->oa_config);



	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);

	intel_runtime_pm_put(dev_priv, stream->wakeref);



err_config:

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