Commit 3cb06b30 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sti-dt-for-v4.4-1' of... 

Merge tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt

Merge "STi DT changes for v4.4, round 1" from Maxime Coquelin:

Highlights:
-----------
 - Add multiple pinctrl configurations to STiH407
 - Enable devices using pins only at board level
 - Add HW RNG device nodes to STiH407 family
 - Fix MMC0 clock configuration on STiH418
 - Fix interrupt related bindings on STiH407

* tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
  ARM: STi: STiH407: Enable the 2 HW Random Number Generators for STiH4{07, 10}
  ARM: DT: STi: STiH418: Fix mmc0 clock configuration
  ARM: STi: DT: STiH407: Rename incorrect interrupt related binding
  ARM: STi: STiH407: Add spi default pinctrl groups.
  ARM: DT: STiH407: Add RMII pinctrl support
  ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX
  ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller
  ARM: DT: STiH407: Add systrace pin configuration
  ARM: DT: STiH407: Add NAND flash controller pin configuration
  ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config
  ARM: DT: STiH407: Add serial3 pinctrl configuration
  ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs
  ARM: STi: DT: STiH407: Add i2c3 alternate pin configs
  ARM: STi: DT: STiH407: Add a cec0 pin definition
  ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level
  ARM: dts: stih407/410: Tidy up display nodes
  ARM: dts: stih407: Enable PWM nodes only board level
parents f85e64b5 cae010a1

arch/arm/boot/dts/stih407-family.dtsi

+45 −2
Original line number Diff line number Diff line
@@ -152,6 +152,19 @@ 
					<ST_IRQ_SYSCFG_DISABLED>;

		};



		/* Display */

		vtg_main: sti-vtg-main@8d02800 {

			compatible = "st,vtg";

			reg = <0x8d02800 0x200>;

			interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;

		};



		vtg_aux: sti-vtg-aux@8d00200 {

			compatible = "st,vtg";

			reg = <0x8d00200 0x100>;

			interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;

		};



		serial@9830000 {

			compatible = "st,asc";

			reg = <0x9830000 0x2c>;
@@ -396,6 +409,8 @@ 
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi1_default>;



			status = "disabled";

		};
@@ -406,6 +421,8 @@ 
			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi2_default>;



			status = "disabled";

		};
@@ -416,6 +433,8 @@ 
			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi3_default>;



			status = "disabled";

		};
@@ -426,6 +445,8 @@ 
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi4_default>;



			status = "disabled";

		};
@@ -437,6 +458,8 @@ 
			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_sysin>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi10_default>;



			status = "disabled";

		};
@@ -447,6 +470,8 @@ 
			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_sysin>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi11_default>;



			status = "disabled";

		};
@@ -457,6 +482,8 @@ 
			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_sysin>;

			clock-names = "ssc";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi12_default>;



			status = "disabled";

		};
@@ -585,7 +612,6 @@ 
		/* COMMS PWM Module */

		pwm0: pwm@9810000 {

			compatible	= "st,sti-pwm";

			status		= "okay";

			#pwm-cells	= <2>;

			reg		= <0x9810000 0x68>;

			pinctrl-names	= "default";
@@ -593,12 +619,13 @@ 
			clock-names	= "pwm";

			clocks		= <&clk_sysin>;

			st,pwm-num-chan = <1>;



			status		= "disabled";

		};



		/* SBC PWM Module */

		pwm1: pwm@9510000 {

			compatible	= "st,sti-pwm";

			status		= "okay";

			#pwm-cells	= <2>;

			reg		= <0x9510000 0x68>;

			pinctrl-names	= "default";
@@ -609,6 +636,22 @@ 
			clock-names	= "pwm";

			clocks		= <&clk_sysin>;

			st,pwm-num-chan = <4>;



			status		= "disabled";

		};



		rng10: rng@08a89000 {

			compatible      = "st,rng";

			reg		= <0x08a89000 0x1000>;

			clocks          = <&clk_sysin>;

			status		= "okay";

		};



		rng11: rng@08a8a000 {

			compatible      = "st,rng";

			reg		= <0x08a8a000 0x1000>;

			clocks          = <&clk_sysin>;

			status		= "okay";

		};

	};

};

arch/arm/boot/dts/stih407-pinctrl.dtsi

+377 −9
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ 
			reg = <0x0961f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			interrupt-names = "irqmux";

			ranges = <0 0x09610000 0x6000>;



			pio0: gpio@09610000 {
@@ -107,12 +107,38 @@ 
				st,retime-pin-mask = <0x3f>;

			};



			cec0 {

				pinctrl_cec0_default: cec0-default {

					st,pins {

						hdmi_cec = <&pio2 4 ALT1 BIDIR>;

					};

				};

			};



			rc {

				pinctrl_ir: ir0 {

					st,pins {

						ir = <&pio4 0 ALT2 IN>;

					};

				};



				pinctrl_uhf: uhf0 {

					st,pins {

						ir = <&pio4 1 ALT2 IN>;

					};

				};



				pinctrl_tx: tx0 {

					st,pins {

						tx = <&pio4 2 ALT2 OUT>;

					};

				};



				pinctrl_tx_od: tx_od0 {

					st,pins {

						tx_od = <&pio4 3 ALT2 OUT>;

					};

				};

			};



			/* SBC_ASC0 - UART10 */
@@ -230,6 +256,33 @@ 
						phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;

					};

				};



				pinctrl_rmii1: rmii1-0 {

					st,pins {

						txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						mdio = <&pio1 0 ALT1 OUT BYPASS 0>;

						mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;

						mdint = <&pio1 3 ALT1 IN BYPASS 0>;

						rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_B>;

						rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_B>;

						rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_B>;

						rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;

					};

				};



				pinctrl_rmii1_phyclk: rmii1_phyclk {

					st,pins {

						phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;

					};

				};



				pinctrl_rmii1_phyclk_ext: rmii1_phyclk_ext {

					st,pins {

						phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;

					};

				};

			};



			pwm1 {
@@ -254,6 +307,57 @@ 
					};

				};

			};



			spi10 {

				pinctrl_spi10_default: spi10-4w-alt1-0 {

					st,pins {

						mtsr = <&pio4 6 ALT1 OUT>;

						mrst = <&pio4 7 ALT1 IN>;

						scl = <&pio4 5 ALT1 OUT>;

					};

				};



				pinctrl_spi10_3w_alt1_0: spi10-3w-alt1-0 {

					st,pins {

						mtsr = <&pio4 6 ALT1 BIDIR_PU>;

						scl = <&pio4 5 ALT1 OUT>;

					};

				};

			};



			spi11 {

				pinctrl_spi11_default: spi11-4w-alt2-0 {

					st,pins {

						mtsr = <&pio3 1 ALT2 OUT>;

						mrst = <&pio3 0 ALT2 IN>;

						scl = <&pio3 2 ALT2 OUT>;

					};

				};



				pinctrl_spi11_3w_alt2_0: spi11-3w-alt2-0 {

					st,pins {

						mtsr = <&pio3 1 ALT2 BIDIR_PU>;

						scl = <&pio3 2 ALT2 OUT>;

					};

				};

			};



			spi12 {

				pinctrl_spi12_default: spi12-4w-alt2-0 {

					st,pins {

						mtsr = <&pio3 6 ALT2 OUT>;

						mrst = <&pio3 4 ALT2 IN>;

						scl = <&pio3 7 ALT2 OUT>;

					};

				};



				pinctrl_spi12_3w_alt2_0: spi12-3w-alt2-0 {

					st,pins {

						mtsr = <&pio3 6 ALT2 BIDIR_PU>;

						scl = <&pio3 7 ALT2 OUT>;

					};

				};

			};

		};



		pin-controller-front0 {
@@ -264,7 +368,7 @@ 
			reg = <0x0920f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			interrupt-names = "irqmux";

			ranges = <0 0x09200000 0x10000>;



			pio10: pio@09200000 {
@@ -422,20 +526,180 @@ 
			};



			i2c3 {

				pinctrl_i2c3_default: i2c3-default {

				pinctrl_i2c3_default: i2c3-alt1-0 {

					st,pins {

						sda = <&pio18 6 ALT1 BIDIR>;

						scl = <&pio18 5 ALT1 BIDIR>;

					};

				};

				pinctrl_i2c3_alt1_1: i2c3-alt1-1 {

					st,pins {

						sda = <&pio17 7 ALT1 BIDIR>;

						scl = <&pio17 6 ALT1 BIDIR>;

					};

				};

				pinctrl_i2c3_alt3_0: i2c3-alt3-0 {

					st,pins {

						sda = <&pio13 6 ALT3 BIDIR>;

						scl = <&pio13 5 ALT3 BIDIR>;

					};

				};

			};



			spi0 {

				pinctrl_spi0_default: spi0-default {

				pinctrl_spi0_default: spi0-4w-alt2-0 {

					st,pins {

						mtsr = <&pio10 6 ALT2 OUT>;

						mrst = <&pio10 7 ALT2 IN>;

						scl = <&pio10 5 ALT2 OUT>;

					};

				};



				pinctrl_spi0_3w_alt2_0: spi0-3w-alt2-0 {

					st,pins {

						mtsr = <&pio10 6 ALT2 BIDIR_PU>;

						scl = <&pio10 5 ALT2 OUT>;

					};

				};



				pinctrl_spi0_4w_alt1_0: spi0-4w-alt1-0 {

					st,pins {

						mtsr = <&pio19 7 ALT1 OUT>;

						mrst = <&pio19 5 ALT1 IN>;

						scl = <&pio19 6 ALT1 OUT>;

					};

				};



				pinctrl_spi0_3w_alt1_0: spi0-3w-alt1-0 {

					st,pins {

						mtsr = <&pio19 7 ALT1 BIDIR_PU>;

						scl = <&pio19 6 ALT1 OUT>;

					};

				};

			};



			spi1 {

				pinctrl_spi1_default: spi1-4w-alt2-0 {

					st,pins {

						mtsr = <&pio11 1 ALT2 OUT>;

						mrst = <&pio11 2 ALT2 IN>;

						scl = <&pio11 0 ALT2 OUT>;

					};

				};



				pinctrl_spi1_3w_alt2_0: spi1-3w-alt2-0 {

					st,pins {

						mtsr = <&pio12 6 ALT2 BIDIR>;

						mrst = <&pio12 7 ALT2 BIDIR>;

						scl = <&pio12 5 ALT2 BIDIR>;

						mtsr = <&pio11 1 ALT2 BIDIR_PU>;

						scl = <&pio11 0 ALT2 OUT>;

					};

				};



				pinctrl_spi1_4w_alt1_0: spi1-4w-alt1-0 {

					st,pins {

						mtsr = <&pio14 3 ALT1 OUT>;

						mrst = <&pio14 4 ALT1 IN>;

						scl = <&pio14 2 ALT1 OUT>;

					};

				};



				pinctrl_spi1_3w_alt1_0: spi1-3w-alt1-0 {

					st,pins {

						mtsr = <&pio14 3 ALT1 BIDIR_PU>;

						scl = <&pio14 2 ALT1 OUT>;

					};

				};

			};



			spi2 {

				pinctrl_spi2_default: spi2-4w-alt2-0 {

					st,pins {

						mtsr = <&pio12 6 ALT2 OUT>;

						mrst = <&pio12 7 ALT2 IN>;

						scl = <&pio12 5 ALT2 OUT>;

					};

				};



				pinctrl_spi2_3w_alt2_0: spi2-3w-alt2-0 {

					st,pins {

						mtsr = <&pio12 6 ALT2 BIDIR_PU>;

						scl = <&pio12 5 ALT2 OUT>;

					};

				};



				pinctrl_spi2_4w_alt1_0: spi2-4w-alt1-0 {

					st,pins {

						mtsr = <&pio14 6 ALT1 OUT>;

						mrst = <&pio14 7 ALT1 IN>;

						scl = <&pio14 5 ALT1 OUT>;

					};

				};



				pinctrl_spi2_3w_alt1_0: spi2-3w-alt1-0 {

					st,pins {

						mtsr = <&pio14 6 ALT1 BIDIR_PU>;

						scl = <&pio14 5 ALT1 OUT>;

					};

				};



				pinctrl_spi2_4w_alt2_1: spi2-4w-alt2-1 {

					st,pins {

						mtsr = <&pio15 6 ALT2 OUT>;

						mrst = <&pio15 7 ALT2 IN>;

						scl = <&pio15 5 ALT2 OUT>;

					};

				};



				pinctrl_spi2_3w_alt2_1: spi2-3w-alt2-1 {

					st,pins {

						mtsr = <&pio15 6 ALT2 BIDIR_PU>;

						scl = <&pio15 5 ALT2 OUT>;

					};

				};

			};



			spi3 {

				pinctrl_spi3_default: spi3-4w-alt3-0 {

					st,pins {

						mtsr = <&pio13 6 ALT3 OUT>;

						mrst = <&pio13 7 ALT3 IN>;

						scl = <&pio13 5 ALT3 OUT>;

					};

				};



				pinctrl_spi3_3w_alt3_0: spi3-3w-alt3-0 {

					st,pins {

						mtsr = <&pio13 6 ALT3 BIDIR_PU>;

						scl = <&pio13 5 ALT3 OUT>;

					};

				};



				pinctrl_spi3_4w_alt1_0: spi3-4w-alt1-0 {

					st,pins {

						mtsr = <&pio17 7 ALT1 OUT>;

						mrst = <&pio17 5 ALT1 IN>;

						scl = <&pio17 6 ALT1 OUT>;

					};

				};



				pinctrl_spi3_3w_alt1_0: spi3-3w-alt1-0 {

					st,pins {

						mtsr = <&pio17 7 ALT1 BIDIR_PU>;

						scl = <&pio17 6 ALT1 OUT>;

					};

				};



				pinctrl_spi3_4w_alt1_1: spi3-4w-alt1-1 {

					st,pins {

						mtsr = <&pio18 6 ALT1 OUT>;

						mrst = <&pio18 7 ALT1 IN>;

						scl = <&pio18 5 ALT1 OUT>;

					};

				};



				pinctrl_spi3_3w_alt1_1: spi3-3w-alt1-1 {

					st,pins {

						mtsr = <&pio18 6 ALT1 BIDIR_PU>;

						scl = <&pio18 5 ALT1 OUT>;

					};

				};

			};
@@ -627,6 +891,18 @@ 
					};

				};

			};



			systrace {

				pinctrl_systrace_default: systrace-default {

					st,pins {

						trc_data0 = <&pio11 3 ALT5 OUT>;

						trc_data1 = <&pio11 4 ALT5 OUT>;

						trc_data2 = <&pio11 5 ALT5 OUT>;

						trc_data3 = <&pio11 6 ALT5 OUT>;

						trc_clk   = <&pio11 7 ALT5 OUT>;

					};

				};

			};

		};



		pin-controller-front1 {
@@ -637,7 +913,7 @@ 
			reg = <0x0921f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			interrupt-names = "irqmux";

			ranges = <0 0x09210000 0x10000>;



			tsin4 {
@@ -670,7 +946,7 @@ 
			reg = <0x0922f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			interrupt-names = "irqmux";

			ranges = <0 0x09220000 0x6000>;



			pio30: gpio@09220000 {
@@ -758,6 +1034,47 @@ 
					};

				};

			};



			spi4 {

				pinctrl_spi4_default: spi4-4w-alt1-0 {

					st,pins {

						mtsr = <&pio30 1 ALT1 OUT>;

						mrst = <&pio30 2 ALT1 IN>;

						scl = <&pio30 0 ALT1 OUT>;

					};

				};



				pinctrl_spi4_3w_alt1_0: spi4-3w-alt1-0 {

					st,pins {

						mtsr = <&pio30 1 ALT1 BIDIR_PU>;

						scl = <&pio30 0 ALT1 OUT>;

					};

				};



				pinctrl_spi4_4w_alt3_0: spi4-4w-alt3-0 {

					st,pins {

						mtsr = <&pio34 1 ALT3 OUT>;

						mrst = <&pio34 2 ALT3 IN>;

						scl = <&pio34 0 ALT3 OUT>;

					};

				};



				pinctrl_spi4_3w_alt3_0: spi4-3w-alt3-0 {

					st,pins {

						mtsr = <&pio34 1 ALT3 BIDIR_PU>;

						scl = <&pio34 0 ALT3 OUT>;

					};

				};

			};



			serial3 {

				pinctrl_serial3: serial3-0 {

					st,pins {

						tx = <&pio31 3 ALT1 OUT>;

						rx = <&pio31 4 ALT1 IN>;

					};

				};

			};

		};



		pin-controller-flash {
@@ -811,6 +1128,57 @@ 
						emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;

					};

				};

				pinctrl_sd0: sd0-0 {

					st,pins {

						sd_clk = <&pio40 6 ALT1 BIDIR>;

						sd_cmd = <&pio40 7 ALT1 BIDIR_PU>;

						sd_dat0 = <&pio41 0 ALT1 BIDIR_PU>;

						sd_dat1 = <&pio41 1 ALT1 BIDIR_PU>;

						sd_dat2 = <&pio41 2 ALT1 BIDIR_PU>;

						sd_dat3 = <&pio41 3 ALT1 BIDIR_PU>;

						sd_led = <&pio42 0 ALT2 OUT>;

						sd_pwren = <&pio42 2 ALT2 OUT>;

						sd_vsel = <&pio42 3 ALT2 OUT>;

						sd_cd = <&pio42 4 ALT2 IN>;

						sd_wp = <&pio42 5 ALT2 IN>;

					};

				};

			};



			fsm {

				pinctrl_fsm: fsm {

					st,pins {

						spi-fsm-clk = <&pio40 1 ALT1 OUT>;

						spi-fsm-cs = <&pio40 0 ALT1 OUT>;

						spi-fsm-mosi = <&pio40 2 ALT1 OUT>;

						spi-fsm-miso = <&pio40 3 ALT1 IN>;

						spi-fsm-hol = <&pio40 5 ALT1 OUT>;

						spi-fsm-wp = <&pio40 4 ALT1 OUT>;

					};

				};

			};



			nand {

				pinctrl_nand: nand {

					st,pins {

						nand_cs1 = <&pio40 6 ALT3 OUT>;

						nand_cs0 = <&pio40 7 ALT3 OUT>;

						nand_d0 = <&pio41 0 ALT3 BIDIR>;

						nand_d1 = <&pio41 1 ALT3 BIDIR>;

						nand_d2 = <&pio41 2 ALT3 BIDIR>;

						nand_d3 = <&pio41 3 ALT3 BIDIR>;

						nand_d4 = <&pio41 4 ALT3 BIDIR>;

						nand_d5 = <&pio41 5 ALT3 BIDIR>;

						nand_d6 = <&pio41 6 ALT3 BIDIR>;

						nand_d7 = <&pio41 7 ALT3 BIDIR>;

						nand_we = <&pio42 0 ALT3 OUT>;

						nand_dqs = <&pio42 1 ALT3 OUT>;

						nand_ale = <&pio42 2 ALT3 OUT>;

						nand_cle = <&pio42 3 ALT3 OUT>;

						nand_rnb = <&pio42 4 ALT3 IN>;

						nand_oe = <&pio42 5 ALT3 OUT>;

					};

				};

			};

		};

	};

arch/arm/boot/dts/stih407.dtsi

+0 −13
Original line number Diff line number Diff line
@@ -10,19 +10,6 @@ 
#include "stih407-family.dtsi"

/ {

	soc {

		/* Display */

		vtg_main: sti-vtg-main@8d02800 {

			compatible = "st,vtg";

			reg = <0x8d02800 0x200>;

			interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;

		};



		vtg_aux: sti-vtg-aux@8d00200 {

			compatible = "st,vtg";

			reg = <0x8d00200 0x100>;

			interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;

		};



		sti-display-subsystem {

			compatible = "st,sti-display-subsystem";

			#address-cells = <1>;

arch/arm/boot/dts/stih410-b2120.dts

+24 −0
Original line number Diff line number Diff line
@@ -35,5 +35,29 @@ 
			sd-uhs-sdr104;

			sd-uhs-ddr50;

		};



		usb2_picophy1: phy2 {

			status = "okay";

		};



		usb2_picophy2: phy3 {

			status = "okay";

		};



		ohci0: usb@9a03c00 {

			status = "okay";

		};



		ehci0: usb@9a03e00 {

			status = "okay";

		};



		ohci1: usb@9a83c00 {

			status = "okay";

		};



		ehci1: usb@9a83e00 {

			status = "okay";

		};

	};

};

arch/arm/boot/dts/stih410.dtsi

+11 −12
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ 
			resets = <&softreset STIH407_PICOPHY_SOFTRESET>,

				 <&picophyreset STIH407_PICOPHY0_RESET>;

			reset-names = "global", "port";



			status = "disabled";

		};



		usb2_picophy2: phy3 {
@@ -31,6 +33,8 @@ 
			resets = <&softreset STIH407_PICOPHY_SOFTRESET>,

				 <&picophyreset STIH407_PICOPHY1_RESET>;

			reset-names = "global", "port";



			status = "disabled";

		};



		ohci0: usb@9a03c00 {
@@ -43,6 +47,8 @@ 
			reset-names = "power", "softreset";

			phys = <&usb2_picophy1>;

			phy-names = "usb";



			status = "disabled";

		};



		ehci0: usb@9a03e00 {
@@ -57,6 +63,8 @@ 
			reset-names = "power", "softreset";

			phys = <&usb2_picophy1>;

			phy-names = "usb";



			status = "disabled";

		};



		ohci1: usb@9a83c00 {
@@ -69,6 +77,8 @@ 
			reset-names = "power", "softreset";

			phys = <&usb2_picophy2>;

			phy-names = "usb";



			status = "disabled";

		};



		ehci1: usb@9a83e00 {
@@ -83,19 +93,8 @@ 
			reset-names = "power", "softreset";

			phys = <&usb2_picophy2>;

			phy-names = "usb";

		};



		/* Display */

		vtg_main: sti-vtg-main@8d02800 {

			compatible = "st,vtg";

			reg = <0x8d02800 0x200>;

			interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;

		};



		vtg_aux: sti-vtg-aux@8d00200 {

			compatible = "st,vtg";

			reg = <0x8d00200 0x100>;

			interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;

			status = "disabled";

		};



		sti-display-subsystem {

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